Execute OpenCL™ applications on an Intel® CPU running Windows* OS or Linux* OS. Intel® CPU Runtime for OpenCL™ Applications 18.1 also serves as a straightforward development vehicle for heterogeneous OpenCL™ development with Intel® SDK for OpenCL™ Applications.
The 18.1 release includes:
- Support of Intel® Advanced Vector Extensions 512 (Intel® AVX-512) ISA on Intel® Xeon® Platinum processor (formerly code name Skylake)
- Enabled features of OpenCL™ 2.1. The product is based on a published Khronos* Specification and has passed the Khronos Conformance Process. The conformance record can be found at https://www.khronos.org/conformance/adopters/conformant-products/opencl. Refer to submission #322 recorded on October 7, 2018.
- Support for vectorization width 16 for the environment and configuration file variable CL_CONFIG_CPU_VECTORIZER_MODE, as well as for OpenCL™ C optional kernel attribute intel_vec_len_hint
- Support for OpenCL™ Kernel debugging on Linux* OS with GDB*
- Improved coexistence support with Intel® Graphics Compute Runtime for OpenCL™ Driver when both are installed.
- Changed the platform name returned via clGetPlatformInfo(...) OpenCL™ API call with CL_PLATFORM_NAME bitflag to “Intel(R) CPU Runtime for OpenCL(TM) Applications”
- New environment variable CL_CONFIG_CPU_TARGET_ARCH. It generates code exclusively for a given target CPU architecture. Allows only lowering the instruction set level supported by CPU:
Allowed values are:
Generates code for processors that support Intel® Advanced Vector Extensions 512 (Intel® AVX-512) Foundation instructions, Intel® AVX-512 Conflict Detection instructions, Intel® AVX-512 Doubleword and Quadword instructions, Intel® AVX-512 Byte and Word instructions and Intel® AVX-512 Vector Length Extensions for Intel® processors, and the instructions enabled with core-avx2.
Generates code for processors that support Intel® Advanced Vector Extensions 2 (Intel® AVX2), Intel® AVX, SSE4.2 SSE4.1, SSE3, SSE2, SSE, and SSSE3 instructions.
Generates code for processors that support Intel® Advanced Vector Extensions (Intel® AVX), Intel® SSE4.2, SSE4.1, SSE3, SSE2, SSE, and SSSE3 instructions.
Generates code for processors that support Intel® SSE4.2 Efficient Accelerated String and Text Processing instructions. May also generate code for Intel® SSE4 Vectorizing Compiler and Media Accelerator, Intel® SSE3, SSE2, SSE, and SSSE3 instructions.
- Fixed an issue with user functions not being inlined in programs created using clCreateProgramWithIL(...) OpenCL™ API call
- Fixed incorrectly reported CL_DEVICE_MAX_COMPUTE_UNITS for multi-socket Intel® Xeon™ systems (reported on forum https://software.intel.com/en-us/forums/opencl/topic/702240)
- Fixed incompatibility with Intel® Threading Building Blocks (Intel® TBB) max_allowed_parallelism parameter
- Fixed an issue with CL_DRIVER_VERSION returning incorrect driver version
- Improved OpenCL™ C compiler diagnostics
- Minor bug fixes
- Updated the compiler infrastructure to LLVM* version 6.0
- Intel® CPU Runtime for OpenCL™ Applications 18.1 supports CPU only. For Intel Xeon Phi™ coprocessor support, use the version 14.2. For more information, see OpenCL™ runtime entry and release notes on the OpenCL™ driver page at: https://software.intel.com/en-us/articles/opencl-drivers .
Comments or questions? Please see the forum community at https://software.intel.com/en-us/forums/opencl.