Batch Processing

SVM classifier follows the general workflow described in Usage Model: Training and Prediction.

Training

For a description of the input and output, refer to Usage Model: Training and Prediction.

At the training stage, SVM classifier has the following parameters:

Parameter

Default Value

Description

algorithmFPType

float

The floating-point type that the algorithm uses for intermediate computations. Can be float or double.

method

defaultDense

The computation method used by the SVM classifier. The only training method supported so far is the Boser method.

nClasses

2

The number of classes.

C

1

Upper bound in conditions of the quadratic optimization problem.

accuracyThreshold

0.001

The training accuracy.

tau

1.0e-6

Tau parameter of the WSS scheme.

maxIterations

1000000

Maximal number of iterations for the algorithm.

cacheSize

8000000

Size of cache in bytes for storing values of the kernel matrix. A non-zero value enables use of a cache optimization technique.

doShrinking

true

A flag that enables use of a shrinking optimization technique.

kernel

Pointer to an object of the KernelIface class

The kernel function. By default, the algorithm uses a linear kernel. For details, see Kernel Functions.

Prediction

For a description of the input and output, refer to Usage Model: Training and Prediction.

At the prediction stage, SVM classifier has the following parameters:

Parameter

Default Value

Description

algorithmFPType

float

The floating-point type that the algorithm uses for intermediate computations. Can be float or double.

method

defaultDense

Performance-oriented computation method, the only prediction method supported by the algorithm.

nClasses

2

The number of classes.

kernel

Pointer to object of the KernelIface class

The kernel function. By default, the algorithm uses a linear kernel.

Optimization Notice

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804

For more complete information about compiler optimizations, see our Optimization Notice.
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