Code Samples

Find code samples for your data center projects.


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Recipe: Building and Running MILC on Intel® Xeon® Processors and Intel® Xeon Phi™ Processors

MILC software represents a set of codes written by the MIMD Lattice Computation collaboration used to study quantum chromodynamics. This article provides instructions for code access, build and run directions for the “ks_imp_rhmc” application on Intel® Xeon® Gold and Intel® Xeon Phi™ processors for...

Installing and Building MXNet with Intel® MKL

The latest version of MXNet includes built-in support for the Intel® Math Kernel Library (Intel® MKL) 2018. The latest version of the Intel MKL includes optimizations for Intel® Advanced Vector Extensions 2 (Intel® AVX2) and AVX-512 instructions which are supported in Intel® Xeon® processor and...

FFT length and layout advisor

Multidimensional Fast Fourier Transform (FFT) - selecting optimal sizes and data layout

Accelerating your NVMe drive with SPDK

Accelerate Your NVMe Drives with SPDK

The Storage Performance Development Kit (SPDK) is an open source set of tools and libraries hosted on GitHub that helps you create high-performance and scalable storage applications. This tutorial focuses on the userspace NVMe driver provided by SPDK and illustrates a Hello World example.

Using Intel® Math Kernel Library Compiler Assisted Offload in Intel® Xeon Phi™ Processor

Introduction Beside native execution, another usage model of using the Intel® Math Kernel Library (Intel® MKL) on an Intel® Xeon Phi™ processor is the compiler assisted offload (CAO). The CAO usage model allows users to offload Intel MKL functions...

Improving Performance of Math Functions with Intel® Math Kernel Library

Introduction Intel® Math Kernel Library1 (Intel® MKL) is a product that accelerates math processing routines to increase the performance of an application when running on systems equipped with Intel® processors. Intel MKL includes linear algebra,...

An update to the integration of Intel® Media SDK and FFmpeg

Introduction Intel® GPUs contain fixed function hardware to accelerate video encode, decode, and frame processing, which can now be used with a variety of interfaces.  Media SDK and Media Server Studio provide great performance with an API designed...

Optimizing Computer Applications for Latency: Part 2: Tuning Applications

For applications such as high frequency trading (HFT), search engines and telecommunications, it is essential that latency can be minimized. My previous article Optimizing Computer Applications for Latency, looked at the architecture choices that...

BigDL: Distributed Deep Learning on Apache Spark*

As the leading framework for Distributed ML, the addition of deep learning to the super-popular Spark framework is important, because it allows Spark developers to perform a wide range of data analysis tasks—including data wrangling, interactive queries, and stream processing—within a single...

Profiling Tensorflow* workloads with Intel® VTune™ Amplifier

Machine learning applications are very compute intensive by their nature. That is why optimization for performance is quite important for them. One of the most popular libraries, Tensorflow*, already has an embedded timeline feature that helps...

Using Intel® MPI Library on Intel® Xeon Phi™ Product Family

This document is designed to help users get started writing code and running MPI applications using the Intel® MPI Library on a development platform that includes the Intel® Xeon Phi™ processor.

Performance of Classic Matrix Multiplication Algorithm on Intel® Xeon Phi™ Processor System

Matrix multiplication (MM) of two matrices is one of the most fundamental operations in linear algebra. The algorithm for MM is very simple, it could be easily implemented in any programming language. This paper shows that performance significantly improves when different optimization techniques...