Intel Secure Key Operating Conditions

Intel Secure Key Operating Conditions

Hello,

What is the operating conditions of the Intel Secure Key chip in regards to an Intel Xeon Processor E5-1650 v2?

The following doc states the following in section 3.5.
https://software.intel.com/sites/default/files/managed/4d/91/DRNG_Software_Implementation_Guide_2.0.pdf

"As described in section 3.2.1, the hardware is designed to function across a range of process voltage and
temperature (PVT) levels, exceeding the normal operating range of the processor."

What are the voltages and temperature levels that exceed the normal operating range of the processor.

I'm specifically looking for temperature conditions of where the entropy source would fail.

Thanks,
Eric

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For more complete information about compiler optimizations, see our Optimization Notice.

Eric,

The V, T limits are those given in the documentation for the chip. The entropy source is designed to work within those limits, with suitable engineering margin. The temperature limits are given in terms of the case temperature at the integrated heat spreader (HIS), the limits for the on-die temperatures take into account the thermal delta from the HIS to the die.

The voltages and temperatures at which the entropy source will fail vary from chip to chip, but it will work within the specified voltage and temperature limits.

From ARK..

http://ark.intel.com/products/75780/Intel-Xeon-Processor-E5-1650-v2-12M-Cache-3_50-GHz

VID Voltage Range

0.65–1.30V

“VID Voltage Range is an indicator of the minimum and maximum voltage values at which the processor is designed to operate. The processor communicates VID to the VRM (Voltage Regulator Module), which in turn delivers that correct voltage to the processor.“

 

TCASE

70°C

“Case Temperature is the maximum temperature allowed at the processor Integrated Heat Spreader (IHS).“

Regards,

David Johnston, Intel DRNG Architect.

 

For more details thermal and voltage ratings, see the datasheet..

http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/x...

Package Thermal Specifications, Section 5.1

DC Specifications, Section 7.8

Regards,

David Johnston

 

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