16-byte alignment for ICC 10.x

16-byte alignment for ICC 10.x

Hi,For ICC 11.x on x86-32, I use -falign-stack=maintain-16-byte to get proper stack alignment when entering SS(S)E2/3/4 code (which is written as either inline asm or in a separate object file assembled by nasm/yasm). This works great.ICC 10.x appears to accept -falign-stack=maintain-16-byte, but this doesn't actually do anything. The stack is unaligned when one of those SSE2 functions is entered, and loading data from/to stack using instructions requiring stack alignment (e.g. movdqa) causes a crash.For ICC 10.x, what is the recommended way to maintain 16-byte stack alignment when entering a function requiring such alignment?Thanks,Ronald

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*kick* anyone knows the answer to this?

this option <-falign-functions=16> gave no warning for me.. you check if this option works with 10.1 compiler..

That option controls the placement of code in memory, not the stack frame layout.

Best Reply

There is no solution in the 10.x icc x86 compilers. -falign-stack= was not implemented until 11.0, for GCC compatibility. GCC changed the default stack alignment to 16 bytes without regard to the x86 ABI. The SYSV x86 ABI says the stack is 4 byte aligned. The SYSV x86 ABI was done before MMX or SSE even existed.

Patrick Kennedy
Intel Developer Support

Thanks for the clear answer. While we're well aware of the ABI requirements, we were hoping there might be some trick available, seeing as SSE predates this compiler by a good margin. We appreciate the new flag in 11.0, and will simply disable the functions in question for older compilers.

Just to restate what Mans just said, thanks for the answer.Ronald

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