Intel STM Compiler barrier optimizations

Intel STM Compiler barrier optimizations

Hi -

The TM Compiler and Runtime ABI specification 1.0.1 states that the compiler could generate code without some barriers. In such a case, the compiler places speficic requirements on the runtime. (e.g. code without "after write" barriers requires an in-place update STM).

My understanding is that the Intel STM Compiler v3.0 implements this ABI specification but I am wondering whether it also makes the above relaxations (omitting barriers).



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