Hi, we are designing a new board with ApolloLake and LPDDR4. We are using the memory bit and byte lane swapping rules (cap. 126.96.36.199 of Design Guide Document Number: 557775) and these rules are similar to Apollo Lake Platform MRD (Document Number: 572383).
How can I set these bit and byte lane swapping rules on Intel Firmware Engine project?
I search documentation or tool setup, but I don't find info about it.
Can you help us?
Thanks a lot