Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
This is a peer forum for developers using Intel® technology. Response times vary depending on the complexity of your issue.
Private messages can only be initiated by Intel employees and members of the Intel® Black Belt Developer program.
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Topic / Topic starter Post date Replies Last Postsort ascending
Sticky topic Sticky: Links to instruction documentation
by Thomas Willhalm... 		Fri, 12/31/2010 - 07:07 35
 by james l.
Sun, 03/19/2017 - 15:43
Sticky topic Sticky: Resources about Intel® Transactional Synchronization Extensions (Intel TSX)
by Roman Dementiev... 		Fri, 06/07/2013 - 06:46 6
 by D. Hugh R.
Sat, 05/21/2016 - 09:28
Sticky topic Sticky: Intel® Software Development Emulator release 7.30
by Mark Charney (Intel) 		Mon, 09/21/2015 - 05:23 3
 by Sergio J. C.
Wed, 12/16/2015 - 12:26
Normal topic Check arrays for equality with SIMD
by CommanderLake 		Thu, 09/14/2017 - 10:28 3
 by Tim P.
Sun, 09/17/2017 - 14:05
Hot topic AVX512f on non-MIC this year?
by angus-hewlett 		Fri, 01/30/2015 - 02:56 16
 by jimdempseyatthecove
Sun, 09/17/2017 - 11:12
Normal topic Pin tool AVX scalar/vector identification
by Marko S. 		Fri, 09/08/2017 - 08:24 3
 by Mark Charney (Intel)
Mon, 09/11/2017 - 13:01
Normal topic How to change Intel BIOS Settings
by webdesigncompany 		Sun, 09/10/2017 - 01:33 0
 by webdesigncompany
Sun, 09/10/2017 - 01:33
Hot topic Bugs in Intrinsics Guide (Page: 1, 2, 3, 4)
by andysem 		Wed, 01/30/2013 - 00:24 151
 by Henk-Jan L.
Thu, 09/07/2017 - 12:11
Normal topic State of AVX 512 on Skylake-X
by jan v. 		Sat, 07/08/2017 - 02:17 8
 by jan v.
Thu, 09/07/2017 - 09:02
Normal topic Costs of scatter store
by Johannes P. 		Mon, 09/04/2017 - 11:28 1
 by andysem
Tue, 09/05/2017 - 01:29
Normal topic Software Development Emulator for Windows XP
by Adam L. 		Wed, 08/09/2017 - 06:24 2
 by Adam L.
Fri, 09/01/2017 - 03:13
Normal topic Using scatterstore to interleave two (sparse) 512-bit vector registers
by Johannes P. 		Thu, 08/24/2017 - 03:29 1
 by jimdempseyatthecove
Fri, 08/25/2017 - 07:53
Normal topic New instruction proposal: memcmp-like int compare
by Daniel F. 		Sat, 08/19/2017 - 20:52 13
 by Daniel F.
Tue, 08/22/2017 - 11:12
Normal topic AVX-512 tzcnt
by Johannes P. 		Sun, 08/20/2017 - 07:22 1
 by andysem
Tue, 08/22/2017 - 09:43
Normal topic FIPS 140-2 and Intel cryptographic implementations
by Ryan 		Fri, 08/18/2017 - 11:19 0
 by Ryan
Fri, 08/18/2017 - 11:19
Normal topic Software Development Emulator (Mix Histogramming Tool - Interpretation)
by Cereso R. 		Thu, 08/17/2017 - 10:58 0
 by Cereso R.
Thu, 08/17/2017 - 10:58
Normal topic About MONITOR and MWAIT
by Luchezar B. 		Fri, 08/04/2017 - 02:01 2
 by Luchezar B.
Fri, 08/04/2017 - 04:04
Normal topic Any docs or manuals about MPK(memory protection keys)
by Du D. 		Fri, 07/28/2017 - 20:01 1
 by Mark Charney (Intel)
Mon, 07/31/2017 - 06:51
Normal topic Some Questions About New Arch (Memory Protection Keys)
by Wu J. 		Wed, 07/26/2017 - 07:37 0
 by Wu J.
Wed, 07/26/2017 - 07:37
Normal topic Intel please update hard copy manuals @ lulu.com
by Russell Van Zandt 		Mon, 07/24/2017 - 15:49 0
 by Russell Van Zandt
Mon, 07/24/2017 - 15:49
Normal topic Data conversion from scalar to vector
by Jun Y. 		Mon, 07/24/2017 - 13:35 0
 by Jun Y.
Mon, 07/24/2017 - 13:35
Normal topic C++ runtime use SSE/SSE2
by Anatoly K. 		Sun, 07/16/2017 - 05:04 0
 by Anatoly K.
Sun, 07/16/2017 - 05:04
Normal topic #SS on inter-privilege IRET
by Konstantin B. 		Sat, 07/15/2017 - 00:44 0
 by Konstantin B.
Sat, 07/15/2017 - 00:44
Normal topic Intel 's Assembler
by Anatoly K. 		Tue, 07/11/2017 - 03:05 6
 by Mark Charney (Intel)
Fri, 07/14/2017 - 08:21
Normal topic Software Development Emulator With Intel TXT support
by Bhushan J. 		Tue, 07/11/2017 - 06:59 2
 by Bhushan J.
Wed, 07/12/2017 - 13:16
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For more complete information about compiler optimizations, see our Optimization Notice.