Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
Intel monitors this forum Monday – Friday, 09:00 – 17:00 Pacific Time (GMT –7:00). Depending on the amount of research we need to do to track down the answer, it may take a day or two for us to respond.
Topic / Topic starter Post date Replies Last Postsort ascending
Sticky topic Sticky: Links to instruction documentation
by Thomas Willhalm...
Fri, 12/31/2010 - 07:07 34
by sirrida
Mon, 11/14/2016 - 04:51
Sticky topic Sticky: Resources about Intel® Transactional Synchronization Extensions (Intel TSX)
by Roman Dementiev...
Fri, 06/07/2013 - 06:46 6
by D. Hugh R.
Sat, 05/21/2016 - 09:28
Sticky topic Sticky: Intel® Software Development Emulator release 7.30
by Mark Charney (Intel)
Mon, 09/21/2015 - 05:23 3
by Sergio J. C.
Wed, 12/16/2015 - 12:26
Normal topic Intel(R) Parallel Studio XE 2017 emulator for linux (SDE)
by Nir H.
Tue, 12/06/2016 - 08:28 1
by Ady Tal (Intel)
Wed, 12/07/2016 - 06:37
Normal topic _mm_clmulepi64_si128 and pclmulqdq doc error
by jimdempseyatthecove
Mon, 12/05/2016 - 13:57 0
by jimdempseyatthecove
Mon, 12/05/2016 - 13:57
Normal topic What is the status of VZEROUPPER use?
by Agner
Fri, 11/25/2016 - 12:22 7
by Agner
Fri, 12/02/2016 - 21:56
Normal topic AVX512 On Xeon Phi KNL using Intel Intrinsics
by Mohammad A.
Wed, 11/30/2016 - 13:15 3
by Mohammad A.
Fri, 12/02/2016 - 08:11
Normal topic Supported processors for PTWRITE instruction?
by Muhammad Usman N.
Wed, 11/30/2016 - 11:37 0
by Muhammad Usman N.
Wed, 11/30/2016 - 11:37
Normal topic AVX-512 in graph process applications
by ilya a.
Tue, 11/29/2016 - 12:19 2
by Jeremy W.
Wed, 11/30/2016 - 07:34
Normal topic Software consequences of extending XMM to YMM
by Agner
Wed, 06/18/2008 - 02:33 14
by Agner
Fri, 11/25/2016 - 12:26
Normal topic How to convert two __m256d to one __m512d using intrinsics
by Zekun Y.
Sun, 10/23/2016 - 00:14 5
by areid
Wed, 11/23/2016 - 19:52
Normal topic AVX2 optimized code execution time deviation
by L K.
Wed, 11/16/2016 - 09:10 11
by L K.
Wed, 11/23/2016 - 02:56
Normal topic SDE fails to run a process
by Harald S. (Intel)
Thu, 11/03/2016 - 08:16 1
by MICHAEL G.
Sun, 11/06/2016 - 01:41
Normal topic Retrieving/querying Intrinsic Guide
by Rashawn K. (Intel)
Thu, 10/27/2016 - 08:26 6
by jimdempseyatthecove
Sat, 11/05/2016 - 05:59
Normal topic Do Non-Temporal Loads Prefetch?
by Nicholas B.
Wed, 10/21/2015 - 02:36 9
by Jeremy W.
Sun, 10/23/2016 - 04:44
Normal topic Intel® Xeon Phi™ x200 series (KNL) Ring 3 Monitor/MWait
by Cownie, James H
Thu, 10/13/2016 - 02:04 7
by Cownie, James H
Tue, 10/18/2016 - 05:42
Normal topic popcount emulated for core2quads
by Axxe F.
Fri, 10/14/2016 - 01:12 1
by andysem
Fri, 10/14/2016 - 09:02
Normal topic SSE2 to AVX2 performance question
by Maria G.
Tue, 10/04/2016 - 05:51 3
by Tim P.
Thu, 10/13/2016 - 07:25
Normal topic How is the sign bit represented in memory and in the CPU?
by Marcus J.
Tue, 10/04/2016 - 09:34 2
by Marcus J.
Wed, 10/05/2016 - 21:44
Normal topic How to detect New Instruction support in the Haswell/Broadwell generation Intel® Core™ processor family
by Kumar, Amit
Mon, 10/03/2016 - 14:35 4
by andysem
Wed, 10/05/2016 - 05:08
Normal topic SDE RTM emulation - small issue
by Craig D.
Tue, 10/04/2016 - 09:49 1
by MICHAEL G.
Wed, 10/05/2016 - 02:20
Hot topic Bugs in Intrinsics Guide (Page: 1, 2, 3)
by andysem
Wed, 01/30/2013 - 00:24 141
by Patrick Konsor ...
Tue, 09/27/2016 - 09:43
Normal topic MOV CR8 not serializing?
by Perf S.
Fri, 09/23/2016 - 15:39 0
by Perf S.
Fri, 09/23/2016 - 15:39
Normal topic Updated ISE doc, rev 25 & PCOMMIT change blog
by Mark Charney (Intel)
Wed, 09/14/2016 - 10:26 4
by Mark Charney (Intel)
Thu, 09/15/2016 - 08:58
Normal topic movd instruction not working with Masm 8.0
by slider77
Wed, 07/22/2009 - 14:04 2
by Duncan O.
Thu, 09/08/2016 - 13:32
New posts
No new posts
Hot topic with new posts
Hot topic without new posts
Sticky topic
Locked topic
For more complete information about compiler optimizations, see our Optimization Notice.