Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:
- Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
- Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
- Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
- Intel® SGX forum support has been moved to a new location
This is a peer forum for developers using Intel® technology. Response times vary depending on the complexity of your issue.
Private messages can only be initiated by Intel employees and members of the Intel® Black Belt Developer program.
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Links to instruction documentation by Thomas Willhalm... |
Fri, 12/31/2010 - 07:07 |
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Resources about Intel® Transactional Synchronization Extensions (Intel TSX) by Roman Dementiev... |
Fri, 06/07/2013 - 06:46 |
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Intel® Software Development Emulator release 7.30 by Mark Charney (Intel) |
Mon, 09/21/2015 - 05:23 |
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Some information about 5G Soc Snow Ridge by yan, weizi |
Wed, 02/20/2019 - 19:07 |
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Some Questions About New Arch (Memory Protection Keys) by Wu J. |
Wed, 07/26/2017 - 07:37 |
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Throughput MUL/FMA Broadwell by Tim e. |
Tue, 02/12/2019 - 13:57 |
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sse4.2 popcnt emulator by diaa, mahmoud |
Tue, 02/19/2019 - 05:23 |
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SDE article vs download by Beulich, Jan |
Tue, 02/12/2019 - 02:25 |
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Intel Software Development Emulator updated October 23,2017. by Tenjy, Bert |
Fri, 02/01/2019 - 21:47 |
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permitted CR2 values by Beulich, Jan |
Tue, 02/12/2019 - 02:49 |
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S/G insn interruptibility by Beulich, Jan |
Tue, 02/12/2019 - 02:39 |
Hot topic
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Bugs in Intrinsics Guide
by andysem |
Wed, 01/30/2013 - 00:24 |
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Disabling AVX by emmanuel.attia |
Wed, 03/26/2014 - 10:36 |
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AVX512 for mobile? by Travis D. |
Wed, 09/16/2015 - 13:03 |
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Mistakes: Intel Intrinsics Guide 3.4.2 online: _mm512_mask_cmple_epi32_mask; _mm512_mask_cmplt_epi32_mask by Peng, Zhen |
Mon, 01/14/2019 - 14:03 |
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Ring transitioning using call gates by K., Sina |
Fri, 01/04/2019 - 12:24 |
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x86 manual 325383 --- "resister", s/b "register" by Andres V. |
Wed, 12/26/2018 - 07:02 |
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ambiguity whether VGF2P8MULB supports memory fault suppression by Beulich, Jan |
Mon, 12/17/2018 - 06:34 |
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Intel, please update hardcopy documentation to November 2018 by Russell Van Zandt |
Thu, 12/13/2018 - 16:24 |
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MWAIT Bug Haswell-E(306F1) CPUs with new uCodes(0x3C) by Alex Prophet |
Fri, 12/14/2018 - 04:40 |
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unaligned access by luiceur |
Thu, 11/22/2018 - 07:03 |
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Disabling HW prefetcher by Intel C. |
Sat, 08/25/2018 - 03:02 |
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Error in pseudo-code for RDPMC in SWDM Volume 2 by McCalpin, John |
Tue, 06/19/2018 - 08:33 |
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symbol information of icc with -O2 flag by Shilpa B. |
Mon, 11/05/2018 - 01:50 |
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Entry level Gaming PC- Intel by Mooryes, Joseph |
Tue, 10/30/2018 - 08:25 |
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