Intel Intrinsic Guide problem

Intel Intrinsic Guide problem

When I download the intel intrinsics guide it does not contain any executable program. It does contain a file 0_Warning.txt which says this..BLOCKED FILE ALERTA file has been blocked due to the 'Intel Email File Filtering Policy' rule.Context: 'Intrinsics Guide for Intel AVX2.exe'Disallowed due to Ticket Number: '2624-4eef-9f29-0001'See your system administrator for further information. Copyright 1999-2007 McAfee, Inc.All Rights Reserved.http://www.mcafee.comSince I do not have McAfree on my system I get the impression that whoever uploaded it to intel's website had McAfree and it blocked the .exe from being added.I've used this program in the past I rather like it, is there any chance this could be fixed?Thanks

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The contentof the guideshould still be the same so you can use the oldarchive for the time being if you still have it.

I'll try to find the responsible person who can fix the file.

The archives have been updated and include the binaries now. What's even nicer is that the content has also been updated to include the new instructions for random number generation and AVX2. The packages are available at the same location on the AVX page.

thanks, it's great to have the AVX2 intrinsics in the guide

I just remarked an issue with the decription of_mm256_slli_si256 and _mm256_srli_si256, according to the AVX Programming Reference (Ref. # 319433-011) these are per lane instruction i.e.2 x 128-bit shifts though in the Intrinsic Guide they are described as true 256-bit shifts, which source is right ?

I tested itwith the SDE and it looks like it's the intrinsics guide which is wrong, these are not shifting across 128-bit lanes

now, my goal was to shift 32-bit elements so I can do it withmm256_permutevar8x32_epi32 which looks very powerful for some nasty cases


you're right, the information in Intel Advanced Vector Extensions 2 (v2.6) is wrong.

Correct information can be found in both INTEL ADVANCED VECTOR EXTENSIONS (Ref. # 319433-011) & Intel Composer XE 2011 (Update 8) compiler documentation: Both 128-bit lanes are shifted!

For completeness, I'm adding a link to the reply you've created to clarify this:

Best regards,

Georg Zitzlsberger

thanks I'll have a look ASAP

The next release of the Intel Intrinsic Guide (to be released shortly) will fix these issues.

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