Intel manual has some mistakes

Intel manual has some mistakes

Intel 64 and IA-32 Architectures Software Developers Manual
Volume 1: Basic Architecture
Order Number: 253665-034US March 2010

3.7.5.1 Specifying an Offset in 64-Bit Mode
The offset part of a memory address in 64-bit mode can be specified directly as a
static value or through an address computation made up of one or more of the
following components:
Displacement - An 8-bit, 16-bit, or 32-bit value.
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Intel 64 and IA-32 Architectures Software Developers Manual
Volume 2A: Instruction Set Reference, A-M
Order Number: 253666-034US March 2010

2.2.1.3 Displacement
Addressing in 64-bit mode uses existing 32-bit ModR/M and SIB encodings. The
ModR/M and SIB displacement sizes do not change. They remain 8 bits or 32 bits and
are sign-extended to 64 bits.

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In the first manual it says that displacement can be 16 bits in 64-Bit Mode, in the other one it says it is only 8 or32!!

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For more complete information about compiler optimizations, see our Optimization Notice.

Intel 64 and IA-32 Architectures Software Developers Manual
Volume 1: Basic Architecture
Order Number: 253665-034US March 2010

3.6 OPERAND-SIZE AND ADDRESS-SIZE ATTRIBUTES
Table 3-4 shows effective operand size and address size (when executing in
protected mode or compatibility mode) depending on the settings of the D flag and
the operand-size and address-size prefixes.
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Another mistake!! It is not Table 3-4, it is Table 3-3 actually while the section is explaining operand and address sizes in 32 bits. It is good for lazy documentation people to work hard a little bit!!

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