Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
This is a peer forum for developers using Intel® technology. Response times vary depending on the complexity of your issue.
Private messages can only be initiated by Intel employees and members of the Intel® Black Belt Developer program.
Topic / Topic starter Post date Replies Last Postsort ascending
Normal topic Converting SSE packed integer handling to AVX
by Grace Oliver (Intel)
Tue, 08/09/2011 - 15:26 8
by Grace Oliver (Intel)
Fri, 08/19/2011 - 12:02
Normal topic 1024 bit AVX
by magicfoot
Sun, 07/24/2011 - 10:54 8
by c0d1f1ed
Thu, 08/18/2011 - 07:55
Normal topic Which AVX instructions are 256-bit enabled on SNB-EP?
by Ron B.
Tue, 08/09/2011 - 16:52 8
by Tim P.
Thu, 08/11/2011 - 16:03
Normal topic SSE runtime comparison (gcc 4.6.1)
by debasish83
Sun, 08/07/2011 - 18:28 6
by Tim P.
Sun, 08/07/2011 - 18:28
Normal topic movq doesn't work, it never move the data
by hurricanezhb
Wed, 08/03/2011 - 11:04 3
by hurricanezhb
Wed, 08/03/2011 - 11:04
Normal topic Enabling and Disabling AVX in Visual Studio 2010
by arrahul
Tue, 07/26/2011 - 10:48 5
by Tim P.
Tue, 07/26/2011 - 10:48
Normal topic Intel MIC(Many Integrated Core)
by zhangxiuxia
Tue, 07/12/2011 - 05:19 10
by Tim P.
Wed, 07/20/2011 - 05:03
Normal topic AVX Performance Reduction Vs 128 SIMD
by inteleverywhere
Tue, 07/19/2011 - 06:24 13
by bronxzv
Tue, 07/19/2011 - 06:24
Normal topic AVX2 integer intrinsics usage
by inteleverywhere
Mon, 07/18/2011 - 04:52 1
by Maxym Dmytryche...
Mon, 07/18/2011 - 06:16
Normal topic Estimating of interrupt latency on the x86 CPUs
by zarathu5tra
Sat, 07/16/2011 - 04:57 0
by zarathu5tra
Sat, 07/16/2011 - 04:57
Normal topic Has Fused Multiply-Add been already implemented on Nehaelm?
by HPC-TAMU
Thu, 05/20/2010 - 15:37 13
by c0d1f1ed
Wed, 07/06/2011 - 23:22
Normal topic Looking for efficient way to convert float (32 bit) aligned buffer to short (16 bit) aligned buffer
by gilgil
Tue, 07/05/2011 - 05:26 1
by Matthias Kretz
Tue, 07/05/2011 - 06:56
Normal topic Intel AVX on Microsoft Windows Vista
by inteleverywhere
Mon, 07/04/2011 - 22:52 1
by Tim P.
Mon, 07/04/2011 - 22:52
Normal topic AVX trial facility
by magicfoot
Sat, 07/02/2011 - 12:59 1
by sirrida
Sat, 07/02/2011 - 12:59
Normal topic What are the alignment restrictions on the new Haswell AVX VGATHER instructions ?
by Tim Day
Fri, 07/01/2011 - 02:59 2
by bronxzv
Fri, 07/01/2011 - 15:32
Hot topic Converging AVX and LRBni (Page: 1, 2)
by c0d1f1ed
Tue, 05/10/2011 - 23:27 62
by c0d1f1ed
Fri, 07/01/2011 - 03:59
Normal topic Penealty when mixing AVX and SSE
by maxmus
Thu, 06/16/2011 - 09:15 3
by Brijender Bhart...
Thu, 06/16/2011 - 13:58
Normal topic questions about such Instructions
by zhangxiuxia
Tue, 06/14/2011 - 22:53 2
by zhangxiuxia
Tue, 06/14/2011 - 22:53
Normal topic probable bug in Intel documentation?
by logicman112
Wed, 06/01/2011 - 03:44 1
by Shih Kuo (Intel)
Fri, 06/10/2011 - 17:19
Normal topic Weird BTS Performance
by cwillems
Fri, 06/10/2011 - 07:25 5
by Hussam Mousa (Intel)
Fri, 06/10/2011 - 07:25
Normal topic What is the latency and throughput of the vbroadcastsd instruction?
by jeremyweek
Mon, 06/06/2011 - 10:43 1
by c0d1f1ed
Mon, 06/06/2011 - 10:43
Normal topic Reversing (V)MOVMSKPS (restoring masks from GPR to XMM / YMM)
by Ralf Karrenberg
Fri, 06/03/2011 - 06:14 3
by bronxzv
Fri, 06/03/2011 - 06:14
Normal topic vertical sync
by dido88
Wed, 06/01/2011 - 11:39 1
by Thomas Willhalm...
Wed, 06/01/2011 - 11:39
Normal topic Calculation of Cycles Per Instruction (CPI) for Intel processors.
by anandcta1234
Wed, 06/01/2011 - 08:24 4
by magicfoot
Wed, 06/01/2011 - 08:24
Normal topic P-State transition monitoring
by rdmsr64
Mon, 05/30/2011 - 10:16 5
by mkamruzz
Mon, 05/30/2011 - 10:16
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Hot topic with new posts
Hot topic without new posts
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For more complete information about compiler optimizations, see our Optimization Notice.