Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
This is a peer forum for developers using Intel® technology. Response times vary depending on the complexity of your issue.
Private messages can only be initiated by Intel employees and members of the Intel® Black Belt Developer program.
Topic / Topic starter Post date Replies Last Postsort ascending
Hot topic Random slow downs with AVX2 code.
by Anil M.
Tue, 01/31/2017 - 16:40 31
by Ady Tal (Intel)
Thu, 02/23/2017 - 13:58
Normal topic Cannot access compiler intrinsics for logarithm in Visual Studio
by Anil M.
Wed, 01/25/2017 - 08:43 2
by Anil M.
Mon, 02/20/2017 - 21:50
Normal topic Parallelization + Vectorization using OpenMP in Sandy Bridge
by Claudia W.
Mon, 01/09/2017 - 00:05 2
by Alexander L.
Mon, 02/20/2017 - 07:07
Normal topic Supported processors for PTWRITE instruction?
by Muhammad Usman N.
Wed, 11/30/2016 - 11:37 2
by BEEMAN S. (Intel)
Fri, 02/17/2017 - 12:50
Normal topic Skylake Xeon and AVX-512VL
by Martin Z.
Thu, 02/16/2017 - 00:28 3
by areid
Fri, 02/17/2017 - 00:22
Normal topic why is ‘_mm512d load/store’ intrinsic changed to vmovups not vmovupd?
by Yeongha L.
Sun, 02/12/2017 - 23:09 1
by McCalpin, John
Mon, 02/13/2017 - 09:29
Normal topic Question about latency
by Alexander L.
Sun, 01/29/2017 - 07:09 9
by Todd W.
Sun, 02/12/2017 - 15:14
Normal topic Slightly OT, but maybe somebody has an idea.
by Alexander L.
Mon, 02/06/2017 - 16:11 7
by andysem
Tue, 02/07/2017 - 07:56
Normal topic Intel® Xeon Phi™ x200 series (KNL) Ring 3 Monitor/MWait
by Cownie, James H...
Thu, 10/13/2016 - 02:04 8
by Cownie, James H...
Mon, 02/06/2017 - 01:41
Normal topic Question about performance difference SSE4/AVX vs. AVX2 with dual-channel vs. quad-channel memory
by Alexander L.
Wed, 02/01/2017 - 16:43 4
by Alexander L.
Fri, 02/03/2017 - 14:23
Normal topic E5-1650 v4, What are the AVX 'Base and 'Turbo' Speeds?
by Gregory B.
Tue, 01/31/2017 - 18:04 3
by McCalpin, John
Thu, 02/02/2017 - 10:54
Normal topic Why FMA is slower than SSE here?
by Daniel F.
Fri, 12/16/2016 - 02:23 4
by McCalpin, John
Thu, 01/26/2017 - 13:23
Normal topic CPI rate blows up
by Alexander L.
Fri, 01/20/2017 - 16:01 4
by Alexander L.
Mon, 01/23/2017 - 12:11
Normal topic mitigating permute costs in AVX 256?
by Todd W.
Sun, 01/15/2017 - 09:21 4
by Todd W.
Thu, 01/19/2017 - 18:47
Normal topic _mm_prefetch usage
by Ioan H.
Sun, 01/15/2017 - 06:01 2
by Ioan H.
Tue, 01/17/2017 - 23:51
Normal topic How to speed up this code?
by Alexander L.
Tue, 01/17/2017 - 16:26 0
by Alexander L.
Tue, 01/17/2017 - 16:26
Normal topic Code scales poorly with AVX
by CommanderLake
Wed, 01/11/2017 - 18:32 11
by CommanderLake
Tue, 01/17/2017 - 00:32
Normal topic Is xend treated as a full memory barrier?
by william l.
Fri, 01/13/2017 - 06:25 1
by McCalpin, John
Fri, 01/13/2017 - 11:24
Normal topic Go programs (even an empty one) hang on exit
by Peter W.
Thu, 01/05/2017 - 00:56 1
by Ady Tal (Intel)
Sun, 01/08/2017 - 01:38
Normal topic AVX512 suboptimal intrinsics compilation
by jan v.
Tue, 01/03/2017 - 09:28 7
by jan v.
Sat, 01/07/2017 - 05:28
Normal topic [XED] how to encode mov instruction
by Yuya K.
Tue, 12/27/2016 - 00:16 3
by Yuya K.
Wed, 12/28/2016 - 01:27
Normal topic AVX add slow due to vinsertf128
by CommanderLake
Sat, 12/17/2016 - 17:44 5
by CommanderLake
Tue, 12/20/2016 - 05:12
Normal topic shuffles on load ports
by Ioan H.
Tue, 12/13/2016 - 02:59 2
by Ioan H.
Mon, 12/19/2016 - 06:40
Hot topic VS2015 + SDE Debugger
by bingbing l.
Mon, 05/02/2016 - 07:19 19
by jan v.
Sat, 12/17/2016 - 05:47
Normal topic Intel(R) Parallel Studio XE 2017 emulator for linux (SDE)
by Nir H.
Tue, 12/06/2016 - 08:28 1
by Ady Tal (Intel)
Wed, 12/07/2016 - 06:37
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For more complete information about compiler optimizations, see our Optimization Notice.