Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
This is a peer forum for developers using Intel® technology. Response times vary depending on the complexity of your issue.
Private messages can only be initiated by Intel employees and members of the Intel® Black Belt Developer program.
Topic / Topic starter Post date Repliessort descending Last Post
Sticky topic Sticky: Intel® Software Development Emulator release 7.30
by Mark Charney (Intel)
Mon, 09/21/2015 - 05:23 3
by Sergio J. C.
Wed, 12/16/2015 - 12:26
Sticky topic Sticky: Resources about Intel® Transactional Synchronization Extensions (Intel TSX)
by Roman Dementiev...
Fri, 06/07/2013 - 06:46 6
by D. Hugh R.
Sat, 05/21/2016 - 09:28
Sticky topic Sticky: Links to instruction documentation
by Thomas Willhalm...
Fri, 12/31/2010 - 07:07 35
by james l.
Sun, 03/19/2017 - 15:43
Normal topic Data conversion from scalar to vector
by Jun Y.
Mon, 07/24/2017 - 13:35 0
by Jun Y.
Mon, 07/24/2017 - 13:35
Normal topic TSC Problem
by faball
Fri, 11/27/2009 - 02:52 0
by faball
Mon, 01/11/2010 - 09:36
Normal topic madvise
by Rafał B.
Fri, 03/03/2017 - 11:30 0
by Rafał B.
Fri, 03/03/2017 - 11:30
Normal topic Which instructions behavior differently between VMX mode and Virtual-8086 Mode
by hurricanezhb
Sat, 08/22/2009 - 04:33 0
by hurricanezhb
Sat, 08/22/2009 - 04:33
Normal topic Small typo in Software Development Manual Vol.1 (Version 043)
by rivet_amber
Mon, 07/02/2012 - 14:23 0
by rivet_amber
Mon, 07/02/2012 - 14:23
Normal topic Estimating of interrupt latency on the x86 CPUs
by zarathu5tra
Sat, 07/16/2011 - 04:57 0
by zarathu5tra
Sat, 07/16/2011 - 04:57
Normal topic Intel Graphics Driver Error
by Surya K.
Wed, 09/26/2012 - 16:19 0
by Surya K.
Wed, 09/26/2012 - 16:19
Normal topic quad core q9550 question
by threetwo
Wed, 07/08/2009 - 09:47 0
by threetwo
Wed, 07/08/2009 - 09:47
Normal topic Calculate Miss rate of L2 cache given global and L1 miss rates
by Papote J.
Sun, 05/07/2017 - 12:54 0
by Papote J.
Sun, 05/07/2017 - 12:54
Normal topic SDE: ssc-marks and multiple mix output
by Othman Bouizi (...
Mon, 09/05/2016 - 03:24 0
by Othman Bouizi (...
Mon, 09/05/2016 - 03:24
Normal topic Remembering SSE and FXSAVE
by yuhong2
Thu, 09/03/2009 - 22:53 0
by yuhong2
Thu, 09/03/2009 - 22:53
Normal topic Performance counter discrepancy? X5650 (Westmere) throttling
by ryancox
Mon, 11/29/2010 - 09:20 0
by ryancox
Mon, 11/29/2010 - 09:20
Normal topic announcing reference implementations for AVX approximation instructions
by Mark Charney (Intel)
Fri, 01/15/2016 - 09:51 0
by Mark Charney (Intel)
Fri, 01/15/2016 - 09:51
Normal topic does this exception/interrupt handler run?
by logicman112
Mon, 09/06/2010 - 23:44 0
by logicman112
Mon, 09/06/2010 - 23:44
Normal topic clflush over the LAPIC mapping
by kostikbel1
Mon, 09/14/2009 - 07:49 0
by kostikbel1
Mon, 09/14/2009 - 07:49
Normal topic Processor Trace decoding support library for Atom
by Daniel L.
Mon, 07/06/2015 - 23:26 0
by Daniel L.
Mon, 07/06/2015 - 23:26
Normal topic Intel(R) SDE release 3.09
by Mark Charney (Intel)
Fri, 03/12/2010 - 18:28 0
by Mark Charney (Intel)
Fri, 03/12/2010 - 18:28
Normal topic GCC + static libmpx
by Nick A.
Thu, 03/24/2016 - 19:19 0
by Nick A.
Thu, 03/24/2016 - 19:19
Normal topic is there a standard format in which we provide architecture specific information to a software
by ddmetro
Sun, 10/25/2009 - 16:24 0
by ddmetro
Sun, 10/25/2009 - 16:24
Normal topic pentium cache
by luca83
Thu, 03/26/2009 - 01:01 0
by luca83
Thu, 03/26/2009 - 01:01
Normal topic [smp] Initialization
by medinad
Mon, 09/21/2009 - 08:11 0
by medinad
Mon, 09/21/2009 - 08:11
Normal topic Could intel somehow initiate migration/cleanup for x86 instruction set?
by htuh
Thu, 11/12/2009 - 16:13 0
by htuh
Tue, 01/12/2010 - 10:45
New posts
No new posts
Hot topic with new posts
Hot topic without new posts
Sticky topic
Locked topic
For more complete information about compiler optimizations, see our Optimization Notice.