Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication

 
Topic / Topic starter Post date Replies Last Post
Sticky topic Sticky: Instruction set extensions programming reference, revision 18
by Mark Charney (Intel)
Tue, 02/18/2014 - 05:55 0
by Mark Charney (Intel)
Tue, 02/18/2014 - 05:55
Sticky topic Sticky: Updated Intel® Software Development Emulator
by Ady Tal (Intel)
Tue, 02/18/2014 - 05:44 0
by Ady Tal (Intel)
Tue, 02/18/2014 - 05:44
Sticky topic Sticky: Resources about Intel® Transactional Synchronization Extensions (Intel TSX)
by Roman Dementiev...
Fri, 06/07/2013 - 06:46 4
by andysem
Sun, 06/16/2013 - 23:22
Sticky topic Sticky: Links to instruction documentation
by Thomas Willhalm...
Fri, 12/31/2010 - 07:07 24
by iliyapolak
Wed, 10/16/2013 - 22:42
Normal topic How many info could I get to estimate DRAM bandwidth?
by hchen229
Tue, 11/17/2009 - 08:17 1
by Roman Dementiev...
Tue, 11/17/2009 - 08:17
Normal topic Instruction decoder
by rediclo
Tue, 02/10/2009 - 09:06 0
by rediclo
Tue, 02/10/2009 - 09:06
Normal topic Seek help for AVX shuffle parameters
by Zhibin Niu (Intel)
Mon, 07/23/2012 - 23:06 3
by Tim Prince
Thu, 07/26/2012 - 06:10
Normal topic P-State invariant TSC on Nehalem platforms with multi-packages
by pisymbol
Wed, 06/02/2010 - 09:04 3
by Igor Levicki
Wed, 06/02/2010 - 09:22
Hot topic To use FPU
by GHui
Fri, 06/28/2013 - 02:13 23
by GHui
Thu, 07/11/2013 - 09:27
Normal topic Analyzing Segmented / Linear Address Of A Process
by reverseengineer
Thu, 12/02/2010 - 20:07 1
by Aubrey W. (Intel)
Mon, 12/13/2010 - 14:51
Normal topic Minor documentation bugs of movd and movq
by sirrida
Wed, 11/02/2011 - 07:50 1
by Shih Kuo (Intel)
Wed, 11/02/2011 - 07:50
Normal topic optimal ordering of instructions
by tthsqe
Mon, 08/10/2009 - 20:16 0
by tthsqe
Mon, 08/10/2009 - 20:16
Normal topic SSE 4.2 on which processors?
by md_intel
Thu, 07/31/2008 - 23:08 3
by Thai Le (Intel)
Thu, 07/31/2008 - 23:08
Normal topic movaps running very slow
by nick_1234
Mon, 03/12/2012 - 22:24 3
by Max Locktyukhin...
Thu, 05/10/2012 - 09:05
Normal topic Update Bios lennovo t400
by hoapq
Thu, 02/25/2010 - 23:29 1
by Thomas Willhalm...
Thu, 02/25/2010 - 23:29
Normal topic Array of _m128d values as function argument
by n.anastop
Tue, 03/19/2013 - 06:43 8
by iliyapolak
Fri, 03/22/2013 - 05:42
Normal topic load/store intrinsics in MMX technology(__m64)
by Smart Lubobya
Sun, 09/12/2010 - 01:26 4
by Thomas Willhalm...
Mon, 09/27/2010 - 04:47
Normal topic Weird BTS Performance
by cwillems
Fri, 06/10/2011 - 07:25 5
by Hussam Mousa (Intel)
Fri, 06/10/2011 - 07:25
Normal topic Real value of the CPU frequency when changed with IA32_CLOCK_MODULATION MSR
by medinad
Wed, 05/20/2009 - 04:34 1
by EnioPineda
Fri, 05/29/2009 - 08:16
Normal topic Intel's IA32/64 bit architecture's instruction set encoding
by postaquestion
Thu, 04/24/2008 - 16:45 4
by Agner
Wed, 08/06/2008 - 02:50
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For more complete information about compiler optimizations, see our Optimization Notice.