Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
This is a peer forum for developers using Intel® technology. Response times vary depending on the complexity of your issue.
Private messages can only be initiated by Intel employees and members of the Intel® Black Belt Developer program.
Topic / Topic starter Post date Repliessort descending Last Post
Normal topic Exemple of image Filter SSE acceleration
by eloise_vidal
Fri, 07/27/2012 - 05:06 1
by Sergey Kostrov
Sun, 07/29/2012 - 09:35
Normal topic Intel Compiler AVX Instructions
by inteleverywhere
Fri, 06/18/2010 - 04:02 1
by Thomas Willhalm...
Fri, 06/18/2010 - 04:02
Normal topic AVX2 latency
by CHANGJUN Y. (Intel)
Fri, 02/22/2013 - 00:37 1
by Christian M.
Fri, 02/22/2013 - 02:04
Normal topic Compute eflags
by hunter123
Tue, 06/17/2008 - 14:00 1
by Igor Levicki
Sun, 07/27/2008 - 20:36
Normal topic What's the best way to sum up values in __m128 ?
by zlw
Thu, 02/10/2011 - 15:23 1
by Matthias Kretz
Thu, 02/10/2011 - 15:23
Normal topic How many info could I get to estimate DRAM bandwidth?
by hchen229
Tue, 11/17/2009 - 08:17 1
by Roman Dementiev...
Tue, 11/17/2009 - 08:17
Normal topic Compiling with AES-NI in MS Visual Studio 2008/2010
by e.wang
Thu, 10/14/2010 - 13:07 1
by Juan Rodriguez ...
Thu, 10/14/2010 - 13:07
Normal topic BEXTR intrinsic incompatible with GCC
by Nathan K.
Thu, 08/28/2014 - 11:32 1
by Brandon Hewitt ...
Thu, 08/28/2014 - 13:10
Normal topic Will a vector version of rol be supported in the future
by fafcv z.
Tue, 06/28/2016 - 22:14 1
by jimdempseyatthecove
Wed, 06/29/2016 - 05:05
Normal topic Intel Intrinsic Guide on Linux. Why not?
by jose angel m.
Mon, 04/21/2008 - 12:16 1
by srimks
Mon, 04/21/2008 - 12:16
Normal topic Analyzing Segmented / Linear Address Of A Process
by reverseengineer
Thu, 12/02/2010 - 20:07 1
by Aubrey W.
Mon, 12/13/2010 - 14:51
Normal topic Looking for efficient way to convert float (32 bit) aligned buffer to short (16 bit) aligned buffer
by gilgil
Tue, 07/05/2011 - 05:26 1
by Matthias Kretz
Tue, 07/05/2011 - 06:56
Normal topic Real value of the CPU frequency when changed with IA32_CLOCK_MODULATION MSR
by medinad
Wed, 05/20/2009 - 04:34 1
by EnioPineda
Fri, 05/29/2009 - 08:16
Normal topic AVX2 application released
by bronxzv
Fri, 02/17/2012 - 00:39 1
by Max Locktyukhin...
Wed, 02/22/2012 - 19:01
Normal topic AVX Power consumption (on i5)
by magicfoot
Tue, 03/04/2014 - 02:11 1
by iliyapolak
Tue, 03/04/2014 - 09:46
Normal topic SSE sum of vectors - how to improve cache performance
by Daniel B.
Thu, 02/28/2013 - 23:26 2
by Daniel B.
Fri, 03/15/2013 - 05:21
Normal topic List of interrupss
by Joseph R.
Sun, 04/23/2017 - 09:36 2
by Sergey Kostrov
Tue, 04/25/2017 - 09:39
Normal topic Proposal: Extended setcc
by sirrida
Wed, 05/11/2011 - 15:42 2
by sirrida
Thu, 05/12/2011 - 07:51
Normal topic ssse3+ shuffle instruction
by mustache_marc
Thu, 02/24/2011 - 02:38 2
by denbianh
Thu, 02/24/2011 - 02:38
Normal topic Cycle counts of the new Westmere instructions
by Cryptographer
Tue, 04/13/2010 - 00:10 2
by neni
Tue, 04/13/2010 - 00:10
Normal topic Penalties in SSE4
by Uday Krishna G.
Thu, 10/09/2014 - 04:30 2
by iliyapolak
Mon, 10/20/2014 - 00:03
Normal topic Problem of using Intel SDE on Win7 machine
by yinghuitan
Wed, 05/27/2009 - 11:42 2
by Mark Charney (Intel)
Thu, 05/28/2009 - 05:05
Normal topic SDE produces unstable behavior
by andysem
Mon, 03/31/2014 - 03:26 2
by andysem
Tue, 04/01/2014 - 01:45
Normal topic does pentium E5300 have 2 physical cores ?
by ilbeydinler
Thu, 02/25/2010 - 13:13 2
by ilbeydinler
Thu, 02/25/2010 - 14:00
Normal topic intel phi bandwith
by Guangming T.
Wed, 04/10/2013 - 20:56 2
by iliyapolak
Wed, 04/10/2013 - 22:55
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For more complete information about compiler optimizations, see our Optimization Notice.