Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
Intel monitors this forum Monday – Friday, 09:00 – 17:00 Pacific Time (GMT –7:00). Depending on the amount of research we need to do to track down the answer, it may take a day or two for us to respond.
Topic / Topic starter Post date Replies Last Post
Normal topic AVX Base and Turbo Frequencies on non E5 CPUs
by Andrew L.
Mon, 10/19/2015 - 16:22 5
by iliyapolak
Fri, 12/18/2015 - 12:33
Normal topic Can MPI based application be run on SDE ?
by jnzhoun
Thu, 01/28/2010 - 23:44 3
by jnzhoun
Thu, 01/28/2010 - 23:44
Normal topic x64/ia64 Assemly Instructions in Code Porting
by gangti
Wed, 07/01/2009 - 20:18 3
by jimdempseyatthecove
Wed, 07/01/2009 - 20:18
Normal topic AVX intrinsics: strange output with Intel XE 2011
by bronxzv
Fri, 12/16/2011 - 10:48 6
by bronxzv
Wed, 12/21/2011 - 06:00
Normal topic mem address directly from SSE/AVX register
by Luchezar B.
Thu, 11/14/2013 - 04:02 3
by McCalpin, John
Thu, 11/14/2013 - 10:44
Normal topic I am trying to vectorise
by ikmn j.
Tue, 06/28/2016 - 20:01 1
by jimdempseyatthecove
Wed, 06/29/2016 - 05:09
Normal topic Question on AVX Instruction set reference
by inteleverywhere
Mon, 06/21/2010 - 07:27 1
by Tim P.
Mon, 06/21/2010 - 07:27
Normal topic Could intel somehow initiate migration/cleanup for x86 instruction set?
by htuh
Thu, 11/12/2009 - 16:13 0
by htuh
Tue, 01/12/2010 - 10:45
Hot topic Optimization and Execution speed testing of gamma stirling approximation
by iliyapolak
Sun, 06/17/2012 - 23:24 30
by iliyapolak
Wed, 06/27/2012 - 22:08
Normal topic What is _MM_SHUFFLE macro meaning in the context of AVX
by Hien P.
Tue, 08/26/2014 - 21:44 2
by Hien P.
Wed, 08/27/2014 - 17:28
Normal topic why is ‘_mm512d load/store’ intrinsic changed to vmovups not vmovupd?
by Yeongha L.
Sun, 02/12/2017 - 23:09 1
by McCalpin, John
Mon, 02/13/2017 - 09:29
Normal topic i need intel motherboard drivers!
by paydayloans
Thu, 09/09/2010 - 14:35 1
by Thomas Willhalm...
Fri, 09/10/2010 - 06:43
Hot topic Optimize C code by SSE2
by chang-li
Thu, 01/17/2013 - 18:01 19
by Sergey Kostrov
Thu, 01/24/2013 - 17:12
Normal topic Cache and _mm_prefetch
by Christian M.
Sun, 05/10/2015 - 04:10 5
by Vladimir Sedach
Wed, 05/13/2015 - 02:45
Normal topic sysenter / sysexit: Inconsistent manual + ring 3 access rights
by Raoul
Tue, 02/08/2011 - 05:48 1
by Shih Kuo (Intel)
Wed, 04/06/2011 - 08:39
Normal topic adding or comapring 8 bit unsigned data in XMM register
by biplabraut
Mon, 07/28/2008 - 23:17 3
by biplabraut
Mon, 07/28/2008 - 23:17
Normal topic pentium cache
by luca83
Thu, 03/26/2009 - 01:01 0
by luca83
Thu, 03/26/2009 - 01:01
Normal topic Intel AVX on Microsoft Windows Vista
by inteleverywhere
Mon, 07/04/2011 - 22:52 1
by Tim P.
Mon, 07/04/2011 - 22:52
Normal topic Does the cache prefetcher will abort the rtm transaction?
by zhaoguo w.
Sat, 06/22/2013 - 06:56 5
by McCalpin, John
Mon, 06/24/2013 - 15:46
Normal topic Intel MPX with i5-6300U processor
by Jeremy W.
Thu, 01/21/2016 - 07:03 5
by Jeremy W.
Mon, 01/25/2016 - 06:42
Normal topic about partial register stalls
by hurricanezhb
Sat, 04/04/2009 - 00:45 3
by srimks
Sat, 04/04/2009 - 00:45
Normal topic SSE/AVX on multicore
by magicfoot
Wed, 07/13/2011 - 11:51 2
by bradjordan111
Mon, 09/12/2011 - 06:29
Hot topic Question about example on Optimization manual---AVX mask move to avoid branch penalty
by Deyang Gu
Tue, 06/25/2013 - 11:07 31
by jimdempseyatthecove
Sat, 07/27/2013 - 06:53
Normal topic PIN unresolved external symbol xed_operand_values_set_rep
by Albert g.
Mon, 01/25/2016 - 11:58 0
by Albert g.
Mon, 01/25/2016 - 11:58
Normal topic LBR_SELECT in Nehalem - strange behaviour
by tarmeneldur
Wed, 04/07/2010 - 11:47 0
by tarmeneldur
Wed, 04/07/2010 - 11:50
New posts
No new posts
Hot topic with new posts
Hot topic without new posts
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For more complete information about compiler optimizations, see our Optimization Notice.