Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
Intel monitors this forum Monday – Friday, 09:00 – 17:00 Pacific Time (GMT –7:00). Depending on the amount of research we need to do to track down the answer, it may take a day or two for us to respond.
Topic / Topic starter Post date Replies Last Post
Normal topic Does LBR_SELECT apply to BTF?
by tarmeneldur
Fri, 04/02/2010 - 11:20 2
by tarmeneldur
Fri, 04/02/2010 - 11:24
Normal topic Help an Assembler Noob, it's good karma
by tyrch
Tue, 07/07/2009 - 16:06 6
by Agner
Tue, 07/07/2009 - 16:06
Normal topic Looking for efficient way to convert float (32 bit) aligned buffer to short (16 bit) aligned buffer
by gilgil
Tue, 07/05/2011 - 05:26 1
by Matthias Kretz
Tue, 07/05/2011 - 06:56
Normal topic Does the cache prefetcher will abort the rtm transaction?
by zhaoguo w.
Sat, 06/22/2013 - 06:56 5
by McCalpin, John
Mon, 06/24/2013 - 15:46
Normal topic What is (name withheld)?
by andysem
Wed, 01/20/2016 - 00:48 2
by iliyapolak
Thu, 01/21/2016 - 01:55
Normal topic 4K False Store Forwarding...
by Evren Yurtesen
Tue, 10/19/2010 - 05:29 1
by Thomas Willhalm...
Tue, 10/19/2010 - 05:29
Normal topic Blog post about various routes to AVX vectorisation
by walkingrandomly
Sat, 08/25/2012 - 11:58 0
by walkingrandomly
Sat, 08/25/2012 - 11:58
Normal topic Huge time cost while assigning
by Xinjue Z.
Wed, 12/03/2014 - 18:12 10
by jimdempseyatthecove
Wed, 12/10/2014 - 05:57
Normal topic about partial register stalls
by hurricanezhb
Sat, 04/04/2009 - 00:45 3
by srimks
Sat, 04/04/2009 - 00:45
Normal topic RDTSC variability in Core 2 Quad
by agame
Fri, 02/08/2008 - 19:31 1
by Tim P.
Sat, 02/09/2008 - 06:21
Normal topic MSR at 0x19c bit 2: Indicator of Throttling?
by ryancox
Mon, 11/15/2010 - 11:06 1
by ryancox
Mon, 11/15/2010 - 15:10
Normal topic OT what's the number of registers for the Intel Xeon X7542?
by bravegag
Tue, 10/16/2012 - 02:35 2
by Sergey Kostrov
Sat, 11/03/2012 - 15:18
Normal topic PCIe Root Complex and the PCH
by Robert S.
Fri, 12/19/2014 - 16:36 3
by Robert S.
Tue, 12/23/2014 - 17:40
Normal topic Intel(R) SDE 2.94 release announcement
by Mark Charney (Intel)
Thu, 12/31/2009 - 13:07 6
by twilkens
Tue, 02/02/2010 - 08:19
Normal topic Use SDE emulator for incorporating AES libraries in addition to intrinsics?
by Michelle Chuapr...
Tue, 04/28/2009 - 08:44 1
by Mark Charney (Intel)
Tue, 04/28/2009 - 12:22
Normal topic Tool for detecting stalls in hand coded assembly
by dipaktc
Wed, 05/18/2011 - 01:43 2
by zhangxiuxia
Wed, 05/18/2011 - 01:43
Normal topic intel phi bandwith
by Guangming T.
Wed, 04/10/2013 - 20:56 2
by iliyapolak
Wed, 04/10/2013 - 22:55
Normal topic Intel SDE and PIN doesn't work on Win10 on a VS2015 compiled app
by rtfss1gmail.com
Sun, 09/06/2015 - 08:04 8
by rennieallen
Thu, 08/18/2016 - 11:34
Normal topic probable mistake in documentation---please check
by logicman112
Fri, 08/27/2010 - 22:15 1
by Anthony Bock (Intel)
Tue, 08/31/2010 - 17:59
Normal topic MOVAPS alignment problem
by iliyapolak
Thu, 05/17/2012 - 08:31 2
by iliyapolak
Thu, 05/17/2012 - 11:08
Normal topic Working assembly example for MPX?
by c_43
Wed, 07/09/2014 - 10:58 2
by c_43
Thu, 07/10/2014 - 08:40
Normal topic _mm_prefetch usage
by Ioan H.
Sun, 01/15/2017 - 06:01 2
by Ioan H.
Tue, 01/17/2017 - 23:51
Normal topic SSSE3 intrinsics compilation error on x64 VC++ 2005 platform
by biplabraut
Tue, 01/20/2009 - 03:01 1
by gabest
Tue, 01/20/2009 - 03:01
Normal topic Complex Matrix alignement
by unrue
Mon, 07/12/2010 - 08:47 5
by Arthur Moroz
Mon, 07/12/2010 - 08:47
Normal topic Parallel instructions for detecting MSB in array of bytes
by craptacus
Thu, 10/15/2009 - 12:56 6
by bronxzv
Fri, 10/16/2009 - 01:58
New posts
No new posts
Hot topic with new posts
Hot topic without new posts
Sticky topic
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For more complete information about compiler optimizations, see our Optimization Notice.