Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication

Topic / Topic starter Post datesort descending Replies Last Post
Normal topic __m128 vs __m128i
by ivantsou
Wed, 08/11/2010 - 13:33 1
by Brijender Bhart...
Wed, 08/11/2010 - 14:34
Normal topic seems to be a mistake, regarding manuals, 64 bit push/pop operation
by logicman112
Fri, 08/13/2010 - 21:31 1
by Shih Kuo (Intel)
Fri, 08/13/2010 - 21:31
Normal topic sse2 intrinsic equivalent
by Smart Lubobya
Mon, 08/16/2010 - 09:06 7
by neni
Fri, 09/03/2010 - 15:52
Normal topic The structure of ModR/M byte
by logicman112
Tue, 08/17/2010 - 03:50 2
by logicman112
Tue, 08/17/2010 - 03:50
Normal topic SIMD instruction thoughput observations..
by perfwise
Thu, 08/19/2010 - 15:14 3
by perfwise
Mon, 08/23/2010 - 11:21
Normal topic Possible issues with VPMOVSXWD (VEX.256)
by Eliseo Hernande...
Wed, 08/25/2010 - 13:17 2
by Brijender Bhart...
Wed, 08/25/2010 - 14:39
Normal topic SSE4.2 cpuid support found in Pin/SDE on Intel but not on AMD...
by perfwise
Thu, 08/26/2010 - 15:00 3
by Mark Charney (Intel)
Thu, 08/26/2010 - 15:01
Normal topic probable mistake in documentation---please check
by logicman112
Fri, 08/27/2010 - 22:15 1
by Anthony Bock (Intel)
Tue, 08/31/2010 - 17:59
Normal topic msr for enabling aes-ni instructions
by thome
Sat, 09/04/2010 - 00:52 5
by Nicolae Popovic...
Fri, 11/05/2010 - 04:59
Normal topic probable mistake in documentation---please check2
by logicman112
Sun, 09/05/2010 - 02:45 2
by logicman112
Mon, 09/13/2010 - 21:20
Normal topic How interrupt is acknowledged by front side bus?
by logicman112
Sun, 09/05/2010 - 02:58 1
by Aubrey W. (Intel)
Sun, 09/05/2010 - 02:58
Normal topic does this exception/interrupt handler run?
by logicman112
Mon, 09/06/2010 - 23:44 0
by logicman112
Mon, 09/06/2010 - 23:44
Normal topic This part of the documentation is ambiguous
by logicman112
Tue, 09/07/2010 - 00:23 0
by logicman112
Tue, 09/07/2010 - 00:23
Normal topic Intell compiler 11.1 and AVX
by Ravi Managuli
Wed, 09/08/2010 - 11:48 7
by Kit Chung (Intel)
Tue, 09/14/2010 - 14:49
Normal topic i need intel motherboard drivers!
by paydayloans
Thu, 09/09/2010 - 14:35 1
by Thomas Willhalm...
Fri, 09/10/2010 - 06:43
Normal topic load/store intrinsics in MMX technology(__m64)
by Smart Lubobya
Sun, 09/12/2010 - 01:26 4
by Thomas Willhalm...
Mon, 09/27/2010 - 04:47
Normal topic Doubt in calculating CPIexe
by gokussj9
Mon, 09/13/2010 - 14:39 0
by gokussj9
Mon, 09/13/2010 - 14:39
Normal topic Mistake in Table A-2. One-byte Opcode Map
by 33445621163.com
Tue, 09/14/2010 - 03:34 1
by 33445621163.com
Tue, 09/14/2010 - 03:34
Normal topic __int64 data types
by Smart Lubobya
Sat, 09/18/2010 - 22:19 1
by Tim Prince
Sat, 09/18/2010 - 22:20
Normal topic probable mistake in documentation---please check3
by logicman112
Tue, 09/21/2010 - 00:13 0
by logicman112
Tue, 09/21/2010 - 00:13
Normal topic compatibility mode and interrupt
by logicman112
Tue, 09/21/2010 - 23:52 0
by logicman112
Tue, 09/21/2010 - 23:52
Normal topic edx and rdx on 64-bit machine
by ivantsou
Thu, 09/23/2010 - 17:42 3
by jimdempseyatthecove
Wed, 09/29/2010 - 07:09
Normal topic Cache memory
by prakasht
Sat, 09/25/2010 - 19:21 1
by Tim Prince
Mon, 09/27/2010 - 05:46
Normal topic Why the datasheet is incomplete?
by logicman112
Sun, 09/26/2010 - 04:44 0
by logicman112
Sun, 09/26/2010 - 04:44
Normal topic Difference between L2 cache misses and Bus_Trans_Mem
by gokussj9
Mon, 09/27/2010 - 15:13 1
by neni
Mon, 09/27/2010 - 15:13
New posts
No new posts
Hot topic with new posts
Hot topic without new posts
Sticky topic
Locked topic
For more complete information about compiler optimizations, see our Optimization Notice.