Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
Intel monitors this forum Monday – Friday, 09:00 – 17:00 Pacific Time (GMT –7:00). Depending on the amount of research we need to do to track down the answer, it may take a day or two for us to respond.
Topic / Topic starter Post date Repliessort descending Last Post
Normal topic What are the alignment restrictions on the new Haswell AVX VGATHER instructions ?
by Tim Day
Fri, 07/01/2011 - 02:59 2
by bronxzv
Fri, 07/01/2011 - 15:32
Normal topic Anyone thinking of setting low-width integars with high-width integars?
by kalven
Mon, 06/16/2008 - 01:56 2
by kalven
Thu, 06/19/2008 - 18:52
Normal topic intel xe composer compiler with AVX code
by semsem h.
Mon, 01/25/2016 - 07:21 2
by semsem h.
Tue, 01/26/2016 - 06:13
Normal topic Intel MPX, gcc/as fail to build glibc
by c_43
Tue, 12/16/2014 - 06:33 2
by c_43
Thu, 01/01/2015 - 23:22
Normal topic Proposal: Extended setcc
by sirrida
Wed, 05/11/2011 - 15:42 2
by sirrida
Thu, 05/12/2011 - 07:51
Normal topic The structure of ModR/M byte
by logicman112
Tue, 08/17/2010 - 03:50 2
by logicman112
Tue, 08/17/2010 - 03:50
Normal topic New SIMDLEA Instruction?
by w0wtiger
Sun, 01/11/2009 - 00:52 2
by Max Locktyukhin...
Sun, 01/11/2009 - 00:52
Normal topic CPU Serial Enable Support on Intel Processor
by asj_anuroop
Wed, 09/30/2009 - 04:07 2
by knujohn4
Wed, 09/30/2009 - 04:07
Normal topic How to zero extend packed unsigned 8-bit integers with an AVX intrinsic
by Henk-Jan L.
Mon, 08/29/2016 - 07:13 2
by Henk-Jan L.
Wed, 08/31/2016 - 03:20
Normal topic Application of Half-float (float16) accelerators in software
by Sergey Kostrov
Wed, 10/31/2012 - 06:58 2
by Sergey Kostrov
Wed, 10/31/2012 - 17:26
Normal topic Intel Xeon 5345 & 5560 processor - FMA instructions support
by srimks
Tue, 05/05/2009 - 08:07 2
by srimks
Tue, 05/05/2009 - 18:26
Normal topic CPUID check and CR0 check
by interruptreques...
Fri, 02/17/2012 - 00:51 2
by Sergey Kostrov
Wed, 02/22/2012 - 10:53
Normal topic Problem of using Intel SDE on Win7 machine
by yinghuitan
Wed, 05/27/2009 - 11:42 2
by Mark Charney (Intel)
Thu, 05/28/2009 - 05:05
Normal topic Display problem
by jayarajnayak
Fri, 02/27/2009 - 23:14 2
by coolman010
Fri, 02/27/2009 - 23:14
Normal topic x87 and out-of-order execution
by k_sarnath
Wed, 03/31/2010 - 22:33 2
by k_sarnath
Wed, 03/31/2010 - 22:33
Normal topic Intel SDE and Windows 10 Preview
by John D.
Sat, 05/02/2015 - 07:12 2
by MICHAEL G.
Sun, 05/03/2015 - 02:13
Normal topic Highest valid sub-leaf index of CPUID(EAX = 0DH)
by Jeremy W.
Fri, 02/05/2016 - 11:09 2
by Jeremy W.
Fri, 02/05/2016 - 11:49
Normal topic movd instruction not working with Masm 8.0
by slider77
Wed, 07/22/2009 - 14:04 2
by Ogilvie, Duncan
Thu, 09/08/2016 - 13:32
Normal topic test CPU instructions
by paulsohier
Mon, 05/14/2012 - 02:15 2
by Igor Levicki
Mon, 05/14/2012 - 09:49
Normal topic Bug on elision lock
by Fábio A.
Thu, 08/11/2016 - 19:32 2
by Roman Dementiev...
Fri, 08/12/2016 - 04:17
Normal topic PUSH instruction in 64 bit mode
by logicman112
Sat, 07/17/2010 - 00:20 2
by logicman112
Sat, 07/17/2010 - 00:20
Normal topic gcc and avx
by (name withheld)
Sun, 04/20/2008 - 16:51 2
by srimks
Sun, 04/20/2008 - 16:51
Normal topic Function declaration parameters - asm.
by srimks
Mon, 05/18/2009 - 00:40 2
by srimks
Mon, 05/18/2009 - 00:40
Normal topic Why we didn't learn about this here on the ISN first?
by Igor Levicki
Thu, 02/19/2009 - 00:17 2
by Igor Levicki
Thu, 02/19/2009 - 00:17
Normal topic selecting an element from a __m256d
by Walter D.
Wed, 12/12/2012 - 10:20 2
by Thomas Willhalm...
Thu, 01/03/2013 - 03:31
New posts
No new posts
Hot topic with new posts
Hot topic without new posts
Sticky topic
Locked topic
For more complete information about compiler optimizations, see our Optimization Notice.