Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
Intel monitors this forum Monday – Friday, 09:00 – 17:00 Pacific Time (GMT –7:00). Depending on the amount of research we need to do to track down the answer, it may take a day or two for us to respond.
Topic / Topic starter Post date Repliessort descending Last Post
Normal topic No explanation of comparison codes for integer vector compare instructions
by Michael R.
Wed, 07/29/2015 - 14:42 3
by jimdempseyatthecove
Wed, 08/05/2015 - 04:19
Normal topic monitor/mwait disabled by IA32_MISC_ENABLES MSR?
by godofpumpkins
Fri, 02/13/2009 - 19:11 3
by Igor Levicki
Sat, 02/14/2009 - 11:02
Normal topic Assemblers for the new instructionsets
by Paul C.
Tue, 12/04/2012 - 03:30 3
by Tim P.
Tue, 12/04/2012 - 07:31
Normal topic Copy and modify
by sirrida
Tue, 05/10/2011 - 15:59 3
by sirrida
Tue, 05/10/2011 - 15:59
Normal topic How to generate the SIGSTRUCT and EINITTOKEN for Intel SGX EINIT instruction?
by gu j.
Wed, 12/23/2015 - 02:46 3
by Simon Johnson (...
Mon, 01/04/2016 - 13:34
Normal topic Small mess up with Sandy Bridge?
by davidc1
Wed, 01/26/2011 - 02:13 3
by davidc1
Wed, 01/26/2011 - 02:15
Normal topic Compiler decides to use SSE instead of AVX
by alzamos
Thu, 08/16/2012 - 10:06 3
by alzamos
Mon, 09/17/2012 - 07:47
Normal topic How can i disable haswell cache prefetcher?
by zhaoguo w.
Sat, 06/22/2013 - 06:54 3
by iliyapolak
Fri, 02/07/2014 - 02:42
Normal topic CPUID signature
by zhangxiuxia
Wed, 04/18/2012 - 03:34 3
by Sergey Kostrov
Fri, 07/06/2012 - 16:36
Normal topic Broken links for MPX GCC version on the Intel server?
by c_43
Mon, 06/02/2014 - 09:15 3
by c_43
Fri, 10/10/2014 - 06:40
Normal topic SSE4.2 cpuid support found in Pin/SDE on Intel but not on AMD...
by perfwise
Thu, 08/26/2010 - 15:00 3
by Mark Charney (Intel)
Thu, 08/26/2010 - 15:01
Normal topic Why is my AVX slower than SSE?
by Shaquille W.
Tue, 06/02/2015 - 09:18 3
by Tim P.
Wed, 06/10/2015 - 12:59
Normal topic PIN Failure to initialize DLL file python27.dll
by Albert g.
Mon, 01/25/2016 - 14:58 3
by Ben C.
Thu, 08/04/2016 - 22:36
Normal topic Problem with _mm_load_si128
by pranith
Thu, 10/11/2012 - 18:07 3
by Sergey Kostrov
Tue, 11/13/2012 - 17:08
Normal topic Almost-unit-stride stores
by Fabio L.
Mon, 07/01/2013 - 09:21 3
by jimdempseyatthecove
Thu, 07/18/2013 - 07:40
Normal topic Proposal: mov small constant
by sirrida
Fri, 05/13/2011 - 00:43 3
by c0d1f1ed
Sun, 05/15/2011 - 17:27
Normal topic How to access Cache memory
by suraj_pune
Mon, 01/19/2009 - 04:12 3
by beerandcandy
Mon, 01/19/2009 - 04:12
Normal topic Leakage or Static power of a processor
by gokussj9
Wed, 10/27/2010 - 12:42 3
by gokussj9
Thu, 10/28/2010 - 11:28
Normal topic _mm_clmulepi64_si128
by projection
Tue, 02/07/2012 - 06:24 3
by Thomas Willhalm...
Tue, 02/14/2012 - 10:54
Normal topic adding or comapring 8 bit unsigned data in XMM register
by biplabraut
Mon, 07/28/2008 - 23:17 3
by biplabraut
Mon, 07/28/2008 - 23:17
Normal topic Inline asm
by srimks
Mon, 08/10/2009 - 05:00 3
by srimks
Mon, 08/10/2009 - 05:00
Normal topic FPS drops and Screen freezing
by Ronny Herfindal
Tue, 06/05/2012 - 12:37 3
by iliyapolak
Thu, 06/07/2012 - 04:32
Normal topic AVX slowdown using multicores
by gilrgrgmail.com
Sun, 04/17/2011 - 01:21 3
by jimdempseyatthecove
Tue, 04/26/2011 - 07:56
Normal topic Larrabee docs
by Wolfgang Bauer
Wed, 06/02/2010 - 01:56 3
by knujohn4
Wed, 06/02/2010 - 01:56
Normal topic SSE4 is there a BigInt LIbrary?
by gbrun
Wed, 10/12/2011 - 21:03 3
by styc
Fri, 10/14/2011 - 22:35
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For more complete information about compiler optimizations, see our Optimization Notice.