Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
Intel monitors this forum Monday – Friday, 09:00 – 17:00 Pacific Time (GMT –7:00). Depending on the amount of research we need to do to track down the answer, it may take a day or two for us to respond.
Topic / Topic starter Post date Replies Last Post
Normal topic MSR at 0x19c bit 2: Indicator of Throttling?
by ryancox
Mon, 11/15/2010 - 11:06 1
by ryancox
Mon, 11/15/2010 - 15:10
Normal topic SDE - how to run multi-threaded programs with 2MB TLB..
by twilkens
Tue, 06/09/2009 - 09:00 3
by Dny
Tue, 06/09/2009 - 09:00
Normal topic Guaranteed atomic operation clarification
by Nathan P.
Mon, 06/29/2015 - 20:52 2
by Nathan P.
Tue, 06/30/2015 - 17:26
Normal topic [smp] processor disabled
by medinad
Thu, 10/15/2009 - 11:12 5
by Igor Levicki
Thu, 10/15/2009 - 11:13
Normal topic what micro-operations (uops) instruction decoded?
by zhangxiuxia
Wed, 05/18/2011 - 07:33 3
by iliyapolak
Mon, 09/23/2013 - 07:24
Normal topic Intel(R) SDE 2.94 release announcement
by Mark Charney (Intel)
Thu, 12/31/2009 - 13:07 6
by twilkens
Tue, 02/02/2010 - 08:19
Hot topic SSE4 Register-Handling
by adrian s.
Wed, 07/10/2013 - 07:58 21
by Sergey Kostrov
Thu, 07/18/2013 - 18:38
Normal topic Intel architecture manuals have printing disabled
by Russell Van Zandt
Mon, 02/29/2016 - 05:26 10
by Russell Van Zandt
Sun, 03/13/2016 - 19:44
Normal topic elemental functions for Fortan?
by eimunic
Mon, 11/07/2011 - 07:08 1
by Steve Lionel (Intel)
Fri, 12/02/2011 - 14:07
Normal topic operand size override prefix(66H)
by logicman112
Mon, 06/07/2010 - 20:38 0
by logicman112
Mon, 06/07/2010 - 20:38
Hot topic Detailed info about FTZ & DAZ
by gol
Thu, 07/03/2008 - 01:36 16
by gol
Wed, 07/23/2008 - 05:41
Normal topic BUG: Poor hybrid SSE/AVX code generated
by emmanuel.attia
Wed, 04/23/2014 - 05:37 7
by emmanuel.attia
Tue, 05/06/2014 - 05:51
Normal topic Supported processors for PTWRITE instruction?
by Muhammad Usman N.
Wed, 11/30/2016 - 11:37 2
by BEEMAN S. (Intel)
Fri, 02/17/2017 - 12:50
Normal topic Cross lane operations, how?
by Igor Levicki
Mon, 05/21/2012 - 05:25 9
by sirrida
Thu, 05/24/2012 - 03:16
Normal topic probable mistake in documentation---please check
by logicman112
Fri, 08/27/2010 - 22:15 1
by Anthony Bock (Intel)
Tue, 08/31/2010 - 17:59
Normal topic SSE and sorting
by mrosenrosen
Tue, 02/24/2009 - 20:27 3
by Igor Levicki
Wed, 02/25/2009 - 17:13
Normal topic _mm256_blend_epi16 doesn't work as documented
by Jeff D.
Wed, 12/31/2014 - 11:39 4
by bronxzv
Thu, 01/01/2015 - 04:09
Normal topic SSE/AVX/FMA Unexpected Test Results
by Samuel Š.
Wed, 05/10/2017 - 10:37 11
by Sergey Kostrov
Wed, 05/17/2017 - 12:38
Normal topic icpc avx optimization
by (name withheld)
Wed, 01/02/2013 - 10:06 1
by Tim P.
Wed, 01/02/2013 - 13:07
Normal topic AES on Mobile Sandy Bridge?
by zobisch
Sun, 01/16/2011 - 10:39 2
by davidc1
Sun, 01/16/2011 - 10:39
Normal topic movd instruction not working with Masm 8.0
by slider77
Wed, 07/22/2009 - 14:04 2
by Ogilvie, Duncan
Thu, 09/08/2016 - 13:32
Normal topic SDE failure trying to look at "chrome"
by perfwise
Sun, 04/14/2013 - 19:26 2
by Ady Tal (Intel)
Wed, 04/24/2013 - 00:38
Normal topic Intel® X86 Encoder Decoder (Intel® XED) - new release site
by Mark Charney (Intel)
Thu, 09/10/2015 - 11:27 0
by Mark Charney (Intel)
Thu, 09/10/2015 - 11:27
Hot topic Haswell New Instructions posted
by Mark Buxton (Intel)
Fri, 06/10/2011 - 19:20 15
by Ryan Wong
Mon, 11/18/2013 - 23:11
Normal topic Xed / Objdump errors in disassembly of Intel compiled executables...
by twilkens
Fri, 02/26/2010 - 16:56 2
by twilkens
Fri, 02/26/2010 - 16:56
New posts
No new posts
Hot topic with new posts
Hot topic without new posts
Sticky topic
Locked topic
For more complete information about compiler optimizations, see our Optimization Notice.