Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
Intel monitors this forum Monday – Friday, 09:00 – 17:00 Pacific Time (GMT –7:00). Depending on the amount of research we need to do to track down the answer, it may take a day or two for us to respond.
Topic / Topic starter Post date Replies Last Post
Normal topic SSE runtime comparison (gcc 4.6.1)
by debasish83
Sun, 08/07/2011 - 18:28 6
by Tim P.
Sun, 08/07/2011 - 18:28
Normal topic Intel architecture manuals have printing disabled
by Russell Van Zandt
Mon, 02/29/2016 - 05:26 10
by Russell Van Zandt
Sun, 03/13/2016 - 19:44
Normal topic Adding consecutive large numbers
by Angelos P.
Tue, 04/30/2013 - 06:33 5
by Sergey Kostrov
Thu, 05/02/2013 - 07:31
Normal topic Performance boost is not as expected using SSE intrinsics
by joggingsonggmail.com
Mon, 01/18/2010 - 23:07 6
by bronxzv
Mon, 01/18/2010 - 23:07
Normal topic Application of Half-float (float16) accelerators in software
by Sergey Kostrov
Wed, 10/31/2012 - 06:58 2
by Sergey Kostrov
Wed, 10/31/2012 - 17:26
Normal topic Latest GCC to use with the SDE for MPX?
by c_43
Wed, 07/23/2014 - 05:59 1
by Maurious P.
Wed, 07/23/2014 - 06:31
Normal topic How interrupt is acknowledged by front side bus?
by logicman112
Sun, 09/05/2010 - 02:58 1
by Aubrey W. (Intel)
Sun, 09/05/2010 - 02:58
Normal topic Performance difference between 32bit and 64bit memcpy
by Tim Day
Tue, 01/27/2009 - 06:50 9
by beerandcandy
Tue, 01/27/2009 - 06:50
Normal topic Can SSE code conversion be automated
by magicfoot
Fri, 05/20/2011 - 14:35 4
by Hannes Hofmann
Mon, 05/23/2011 - 05:48
Normal topic Intel® X86 Encoder Decoder (Intel® XED) - new release site
by Mark Charney (Intel)
Thu, 09/10/2015 - 11:27 0
by Mark Charney (Intel)
Thu, 09/10/2015 - 11:27
Normal topic is there a standard format in which we provide architecture specific information to a software
by ddmetro
Sun, 10/25/2009 - 16:24 0
by ddmetro
Sun, 10/25/2009 - 16:24
Hot topic Optimization of sine function's taylor expansion (Page: 1, 2, 3Last Page)
by iliyapolak
Thu, 05/24/2012 - 05:29 342
by iliyapolak
Tue, 12/11/2012 - 23:50
Normal topic TSC Problem
by faball
Fri, 11/27/2009 - 02:52 0
by faball
Mon, 01/11/2010 - 09:36
Normal topic Visual Studio 2012 Release Candidate with support for Haswell new instructions
by Thomas Willhalm...
Fri, 06/29/2012 - 02:54 5
by iliyapolak
Mon, 07/02/2012 - 08:21
Normal topic AVX Power consumption (on i5)
by magicfoot
Tue, 03/04/2014 - 02:11 1
by iliyapolak
Tue, 03/04/2014 - 09:46
Normal topic How to do a "jmp 64b address" in X64 ASM pls ?
by ningji
Fri, 07/23/2010 - 13:19 1
by neni
Fri, 07/23/2010 - 13:19
Hot topic How many MMX/SSE units in Core-2 Quad
by murzik
Mon, 08/25/2008 - 09:03 31
by iliyapolak
Mon, 03/30/2015 - 23:25
Normal topic IRET Pseudo-code Bug
by Philip S.
Thu, 07/23/2015 - 07:46 7
by Mark Charney (Intel)
Thu, 10/15/2015 - 11:56
Normal topic Copy and modify
by sirrida
Tue, 05/10/2011 - 15:59 3
by sirrida
Tue, 05/10/2011 - 15:59
Normal topic Which instructions behavior differently between VMX mode and Virtual-8086 Mode
by hurricanezhb
Sat, 08/22/2009 - 04:33 0
by hurricanezhb
Sat, 08/22/2009 - 04:33
Normal topic CPUID check and CR0 check
by interruptreques...
Fri, 02/17/2012 - 00:51 2
by Sergey Kostrov
Wed, 02/22/2012 - 10:53
Normal topic SDE RTM emulation - small issue
by Craig D.
Tue, 10/04/2016 - 09:49 1
by MICHAEL G.
Wed, 10/05/2016 - 02:20
Hot topic AVX-512 expectations
by c0d1f1ed
Fri, 07/26/2013 - 23:24 29
by iliyapolak
Sun, 09/22/2013 - 23:14
Normal topic SSE/SSE2 INTRINSICS CODES
by Smart Lubobya
Sat, 05/29/2010 - 07:09 7
by Thomas Willhalm...
Wed, 07/07/2010 - 01:57
Normal topic Additional instructions suggestion
by c0d1f1ed
Mon, 04/28/2008 - 14:43 7
by Agner
Wed, 08/06/2008 - 02:37
New posts
No new posts
Hot topic with new posts
Hot topic without new posts
Sticky topic
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For more complete information about compiler optimizations, see our Optimization Notice.