Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
This is a peer forum for developers using Intel® technology. Response times vary depending on the complexity of your issue.
Private messages can only be initiated by Intel employees and members of the Intel® Black Belt Developer program.
Topic / Topic starter Post date Replies Last Post
Normal topic what micro-operations (uops) instruction decoded?
by zhangxiuxia
Wed, 05/18/2011 - 07:33 3
by iliyapolak
Mon, 09/23/2013 - 07:24
Normal topic Intel(R) SDE 2.94 release announcement
by Mark Charney (Intel)
Thu, 12/31/2009 - 13:07 6
by twilkens
Tue, 02/02/2010 - 08:19
Normal topic Intel® Software Development Emulator, Release 6.7
by Ady Tal (Intel)
Tue, 09/24/2013 - 06:35 1
by iliyapolak
Tue, 09/24/2013 - 11:42
Normal topic Intel TSX with STAMP benchmark
by YangHun P.
Thu, 05/19/2016 - 23:58 1
by Roman Dementiev...
Fri, 05/20/2016 - 07:35
Normal topic elemental functions for Fortan?
by eimunic
Mon, 11/07/2011 - 07:08 1
by Steve Lionel (Intel)
Fri, 12/02/2011 - 14:07
Normal topic operand size override prefix(66H)
by logicman112
Mon, 06/07/2010 - 20:38 0
by logicman112
Mon, 06/07/2010 - 20:38
Normal topic Updated Intel® Software Development Emulator
by Mark Charney (Intel)
Sun, 07/20/2014 - 06:13 7
by andysem
Tue, 11/04/2014 - 14:12
Normal topic CPI rate blows up
by Alexander L.
Fri, 01/20/2017 - 16:01 4
by Alexander L.
Mon, 01/23/2017 - 12:11
Normal topic Cross lane operations, how?
by Igor Levicki
Mon, 05/21/2012 - 05:25 9
by sirrida
Thu, 05/24/2012 - 03:16
Normal topic probable mistake in documentation---please check
by logicman112
Fri, 08/27/2010 - 22:15 1
by Anthony Bock (Intel)
Tue, 08/31/2010 - 17:59
Hot topic Detailed info about FTZ & DAZ
by gol
Thu, 07/03/2008 - 01:36 16
by gol
Wed, 07/23/2008 - 05:41
Normal topic A Question about MSR ?
by zp s.
Tue, 04/07/2015 - 10:16 1
by McCalpin, John
Tue, 04/07/2015 - 13:26
Normal topic Software Development Emulator for Windows XP
by Adam L.
Wed, 08/09/2017 - 06:24 2
by Adam L.
Fri, 09/01/2017 - 03:13
Normal topic icpc avx optimization
by (name withheld)
Wed, 01/02/2013 - 10:06 1
by Tim P.
Wed, 01/02/2013 - 13:07
Normal topic How interrupt is acknowledged by front side bus?
by logicman112
Sun, 09/05/2010 - 02:58 1
by Aubrey W.
Sun, 09/05/2010 - 02:58
Normal topic Microinstruction Format
by dargueta
Sat, 07/12/2008 - 22:41 4
by dargueta
Tue, 07/15/2008 - 19:50
Normal topic Include all intrinsics
by Glenn D.
Fri, 04/24/2015 - 14:08 5
by Christian M.
Sun, 05/10/2015 - 03:24
Normal topic New instruction proposal: memcmp-like int compare
by Daniel F.
Sat, 08/19/2017 - 20:52 13
by Daniel F.
Tue, 08/22/2017 - 11:12
Normal topic load and loadu - alignment
by Christian M.
Tue, 01/08/2013 - 04:57 3
by Christian M.
Fri, 01/11/2013 - 07:21
Normal topic VisualStudio compiler parallelisation options and AVX
by alastairblack
Wed, 01/26/2011 - 07:28 12
by timintel
Wed, 02/02/2011 - 11:20
Normal topic SIMD Inline asm execution help
by srimks
Mon, 03/02/2009 - 04:01 14
by Tim P.
Mon, 03/09/2009 - 14:21
Normal topic CPU Instruction counter register
by nuclear_scientist
Fri, 07/31/2009 - 09:37 1
by Tim P.
Fri, 07/31/2009 - 09:37
Normal topic How do you move 128-bit value to a new 258-bit register to both lanes?
by gabest
Tue, 06/18/2013 - 10:31 3
by bronxzv
Tue, 06/18/2013 - 13:16
Normal topic knowing whether AVX or AVX2 is used.
by Po-yen C. (Intel)
Wed, 01/13/2016 - 15:56 8
by Po-yen C. (Intel)
Thu, 01/14/2016 - 14:43
Normal topic Penealty when mixing AVX and SSE
by maxmus
Thu, 06/16/2011 - 09:15 3
by Brijender Bhart...
Thu, 06/16/2011 - 13:58
New posts
No new posts
Hot topic with new posts
Hot topic without new posts
Sticky topic
Locked topic
For more complete information about compiler optimizations, see our Optimization Notice.