Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
This is a peer forum for developers using Intel® technology. Response times vary depending on the complexity of your issue.
Private messages can only be initiated by Intel employees and members of the Intel® Black Belt Developer program.
Topic / Topic starter Post date Repliessort descending Last Post
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by Anatoly K.
Sun, 07/16/2017 - 05:04 0
by Anatoly K.
Sun, 07/16/2017 - 05:04
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by admin
Mon, 12/20/2010 - 21:38 0
by admin
Mon, 12/20/2010 - 21:38
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by isakovsl
Wed, 02/03/2010 - 03:55 0
by isakovsl
Wed, 02/03/2010 - 03:55
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by Albert g.
Mon, 01/25/2016 - 11:58 0
by Albert g.
Mon, 01/25/2016 - 11:58
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by tarmeneldur
Wed, 04/07/2010 - 11:47 0
by tarmeneldur
Wed, 04/07/2010 - 11:50
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by Sathees Palanivel
Thu, 07/29/2010 - 21:23 0
by Sathees Palanivel
Thu, 07/29/2010 - 21:23
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by Private p.
Thu, 10/04/2012 - 14:12 0
by Private p.
Thu, 10/04/2012 - 14:12
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by Monti, Marco
Fri, 10/14/2011 - 07:14 0
by Monti, Marco
Fri, 10/14/2011 - 07:14
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by Denise
Thu, 04/23/2009 - 03:37 0
by Denise
Thu, 04/23/2009 - 03:37
Normal topic determining L1 and L2 cache state
by maamold
Tue, 08/25/2009 - 10:00 0
by maamold
Tue, 08/25/2009 - 10:00
Normal topic Some Questions About New Arch (Memory Protection Keys)
by Wu J.
Wed, 07/26/2017 - 07:37 0
by Wu J.
Wed, 07/26/2017 - 07:37
Normal topic compatibility mode and interrupt
by logicman112
Tue, 09/21/2010 - 23:52 0
by logicman112
Tue, 09/21/2010 - 23:52
Normal topic Intel® X86 Encoder Decoder (Intel® XED) - new release site
by Mark Charney (Intel)
Thu, 09/10/2015 - 11:27 0
by Mark Charney (Intel)
Thu, 09/10/2015 - 11:27
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by Intel Software ...
Mon, 09/22/2008 - 11:46 0
by Intel Software ...
Mon, 09/22/2008 - 11:46
Normal topic operand size override prefix(66H)
by logicman112
Mon, 06/07/2010 - 20:38 0
by logicman112
Mon, 06/07/2010 - 20:38
Normal topic Why the datasheet is incomplete?
by logicman112
Sun, 09/26/2010 - 04:44 0
by logicman112
Sun, 09/26/2010 - 04:44
Normal topic Support for saturation and addition instruction in AVX-512
by Udupi, Nagacharan
Mon, 03/19/2018 - 12:39 0
by Udupi, Nagacharan
Mon, 03/19/2018 - 12:39
Normal topic Intel Systems Programmers Manual query
by dkandula
Tue, 05/24/2011 - 15:01 0
by dkandula
Tue, 05/24/2011 - 15:01
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by Perf S.
Fri, 09/23/2016 - 15:39 0
by Perf S.
Fri, 09/23/2016 - 15:39
Normal topic Incomplete declaration of __m256 AVX data type in Visual Studio 2010
by Sergey Kostrov
Thu, 02/07/2013 - 06:16 0
by Sergey Kostrov
Thu, 02/07/2013 - 06:16
Normal topic Instruction set extensions programming reference, revision 15
by Mark Charney (Intel)
Tue, 07/23/2013 - 10:45 0
by Mark Charney (Intel)
Tue, 07/23/2013 - 10:45
Normal topic Enabling Mon feature using IA32_MISC_ENABLES
by K., Sina
Mon, 04/09/2018 - 23:24 0
by K., Sina
Mon, 04/09/2018 - 23:24
Normal topic Prologue & Epilogue Help
by srimks
Mon, 08/10/2009 - 01:38 0
by srimks
Mon, 08/10/2009 - 01:38
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by ijjys
Fri, 09/18/2009 - 11:06 0
by ijjys
Fri, 09/18/2009 - 11:06
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by maa1
Mon, 11/23/2009 - 11:39 0
by maa1
Mon, 11/23/2009 - 11:39
New posts
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Hot topic with new posts
Hot topic without new posts
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For more complete information about compiler optimizations, see our Optimization Notice.