Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
Intel monitors this forum Monday – Friday, 09:00 – 17:00 Pacific Time (GMT –7:00). Depending on the amount of research we need to do to track down the answer, it may take a day or two for us to respond.
Topic / Topic starter Post date Replies Last Post
Normal topic SSE 3.0, SSE 4.2 in visual studio 2010 ultimate
by arrahul
Thu, 07/28/2011 - 12:53 12
by sukruth-v (Intel)
Wed, 05/08/2013 - 23:13
Hot topic Speedup with bulk/burst/coupled streaming write?
by Alexander L.
Tue, 12/23/2014 - 17:36 17
by bronxzv
Tue, 12/30/2014 - 15:55
Normal topic MOVD: Zero-extension of general purpose register as destination
by Adam Warner
Mon, 07/12/2010 - 23:41 2
by Adam Warner
Mon, 07/12/2010 - 23:41
Normal topic Missing instruction in SSE: PSLLDQ with _bit_ shift amount?
by geofflangdale
Thu, 02/28/2008 - 15:33 4
by happyIntelCamper
Thu, 02/28/2008 - 15:33
Normal topic vperm2f128 operands
by Bill P.
Fri, 10/26/2012 - 07:32 1
by Thomas Willhalm...
Fri, 11/23/2012 - 06:53
Normal topic Prefetch instructions
by bronxzv
Sat, 04/13/2013 - 03:20 5
by iliyapolak
Sat, 04/20/2013 - 23:30
Hot topic Massive speedup of integer SSE2 code using AVX1(!)
by Nikos D.
Sun, 09/06/2015 - 22:32 28
by iliyapolak
Wed, 12/16/2015 - 12:58
Normal topic Obtain time stamp disable (TSD) flag in user-mode
by freeze2046
Tue, 03/29/2011 - 05:54 1
by Chris Hooper
Tue, 03/29/2011 - 05:54
Normal topic sse4.2 instructions
by westmere
Fri, 05/01/2009 - 16:03 7
by Shih Kuo (Intel)
Mon, 11/02/2009 - 09:54
Normal topic Intel's IA32/64 bit architecture's instruction set encoding
by postaquestion
Thu, 04/24/2008 - 16:45 4
by Agner
Wed, 08/06/2008 - 02:50
Normal topic ALU/CPU Error Detection
by Charles E.
Fri, 11/30/2012 - 04:10 11
by iliyapolak
Wed, 01/30/2013 - 06:09
Normal topic About shufps instruction
by Yunqi Z.
Sun, 05/12/2013 - 11:26 3
by Yunqi Z.
Sun, 05/12/2013 - 19:32
Normal topic SSE and multiplication
by Frédéric D.
Mon, 10/05/2015 - 08:47 4
by jimdempseyatthecove
Sat, 10/10/2015 - 06:07
Normal topic Converting Sandy Bridge TSC to wall clock time
by Chris Hooper
Mon, 04/25/2011 - 01:05 10
by Chris Hooper
Wed, 05/11/2011 - 10:58
Normal topic Compiler optimization for SSE4.2 and AVX
by Tim P.
Wed, 05/20/2009 - 10:24 0
by Tim P.
Wed, 05/20/2009 - 10:24
Normal topic Instruction dependencies
by vladkons
Mon, 05/30/2011 - 05:35 13
by vladkons
Mon, 05/30/2011 - 05:35
Normal topic Performance penalty for mixed AVX512 code?
by Russell Van Zandt
Sun, 08/24/2014 - 08:17 7
by Russell Van Zandt
Tue, 09/02/2014 - 05:15
Normal topic Question about performance difference SSE4/AVX vs. AVX2 with dual-channel vs. quad-channel memory
by Alexander L.
Wed, 02/01/2017 - 16:43 4
by Alexander L.
Fri, 02/03/2017 - 14:23
Hot topic division sse2 intrinsic
by Smart Lubobya
Thu, 05/27/2010 - 06:50 16
by Thomas Willhalm...
Fri, 01/07/2011 - 05:33
Hot topic Optimization and Execution speed testing of gamma stirling approximation
by iliyapolak
Sun, 06/17/2012 - 23:24 30
by iliyapolak
Wed, 06/27/2012 - 22:08
Normal topic Analyzing Segmented / Linear Address Of A Process
by reverseengineer
Thu, 12/02/2010 - 20:07 1
by Aubrey W. (Intel)
Mon, 12/13/2010 - 14:51
Normal topic Instruction decoder
by rediclo
Tue, 02/10/2009 - 09:06 0
by rediclo
Tue, 02/10/2009 - 09:06
Normal topic Instruction set extensions programming reference, revision 18
by Mark Charney (Intel)
Tue, 02/18/2014 - 05:55 2
by Mark Charney (Intel)
Fri, 06/06/2014 - 20:30
Normal topic SSE2 to AVX2 performance question
by Maria G.
Tue, 10/04/2016 - 05:51 3
by Tim P.
Thu, 10/13/2016 - 07:25
Normal topic about the reserved field in cpuid
by hurricanezhb
Fri, 01/29/2010 - 13:08 2
by Max Locktyukhin...
Fri, 01/29/2010 - 13:08
New posts
No new posts
Hot topic with new posts
Hot topic without new posts
Sticky topic
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For more complete information about compiler optimizations, see our Optimization Notice.