Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
Intel monitors this forum Monday – Friday, 09:00 – 17:00 Pacific Time (GMT –7:00). Depending on the amount of research we need to do to track down the answer, it may take a day or two for us to respond.
Topic / Topic starter Post date Repliessort descending Last Post
Normal topic SSE and multiplication
by Frédéric D.
Mon, 10/05/2015 - 08:47 4
by jimdempseyatthecove
Sat, 10/10/2015 - 06:07
Normal topic give me a hint,
by jvava
Thu, 02/26/2009 - 03:08 4
by Shih Kuo (Intel)
Thu, 02/26/2009 - 03:08
Normal topic Idea for a new SIMD instruction
by Igor Levicki
Fri, 01/05/2007 - 20:56 4
by Igor Levicki
Mon, 01/22/2007 - 17:57
Normal topic CPUID Signature Values of DisplayFamily_DisplayModel - A new Appendix is Needed in all Intel Manuals
by Sergey Kostrov
Tue, 05/21/2013 - 17:58 4
by iliyapolak
Mon, 06/03/2013 - 22:29
Normal topic looking for information sources on code optimization using the Intel CPU and the MMX/SSE family instruction set
by amoshkov
Fri, 05/09/2008 - 12:21 4
by srimks
Fri, 05/09/2008 - 12:21
Normal topic There are something wrong with using svml in inline ASM
by zhang y.
Wed, 03/05/2014 - 22:58 4
by Vladimir Sedach
Sun, 03/09/2014 - 14:43
Normal topic Calculation of Cycles Per Instruction (CPI) for Intel processors.
by anandcta1234
Wed, 06/01/2011 - 08:24 4
by magicfoot
Wed, 06/01/2011 - 08:24
Normal topic _mm_load_ps generates VMOVUPS
by emmanuel.attia
Thu, 09/26/2013 - 05:33 4
by iliyapolak
Thu, 09/26/2013 - 07:21
Normal topic About 256 bit registers
by gabest
Fri, 12/19/2008 - 21:31 5
by Igor Levicki
Thu, 01/01/2009 - 01:07
Normal topic Generating Prefetch Instructions in AVX code...
by twilkens
Thu, 07/30/2009 - 10:49 5
by Martyn Corden (...
Tue, 08/04/2009 - 11:40
Normal topic msr for enabling aes-ni instructions
by thome
Sat, 09/04/2010 - 00:52 5
by Nicolae Popovic...
Fri, 11/05/2010 - 04:59
Normal topic Prefetch instructions
by bronxzv
Sat, 04/13/2013 - 03:20 5
by iliyapolak
Sat, 04/20/2013 - 23:30
Normal topic Newbie: SSE with integers
by spertulo
Tue, 11/16/2010 - 01:32 5
by 0xr
Tue, 11/16/2010 - 01:32
Normal topic error c2664 in sse2
by Smart Lubobya
Thu, 07/22/2010 - 14:00 5
by Brijender Bhart...
Fri, 07/23/2010 - 10:04
Normal topic Question about CRC32 instruction polynomial
by Igor Levicki
Tue, 05/27/2008 - 10:29 5
by doug.mtview
Fri, 08/14/2009 - 17:36
Normal topic how to use SSE/AVX to find the array index for element > 0 ?
by admin
Mon, 02/07/2011 - 09:08 5
by admin
Tue, 02/08/2011 - 03:03
Normal topic Is there some books about SIMD(sse, avx and so on) optimization?
by zhang h.
Tue, 12/17/2013 - 02:08 5
by John McCalpin
Thu, 04/28/2016 - 08:53
Normal topic Benefits of SSE/AVX processing when an integrated GPU is missing?
by Toby
Tue, 12/16/2014 - 07:08 5
by Toby
Tue, 12/16/2014 - 09:35
Normal topic IA32 ISA
by miro5566
Fri, 02/06/2009 - 05:43 5
by Max Locktyukhin...
Sat, 02/14/2009 - 00:12
Normal topic How is the brandstring formed by BIOSes?
by pgzh
Fri, 07/25/2008 - 15:25 5
by Igor Levicki
Fri, 07/25/2008 - 15:25
Normal topic vminpd and vmulpd do run concurrently on Haswell and earlier CPUs
by Bartek S.
Thu, 04/07/2016 - 17:38 5
by Bartek S.
Sat, 04/09/2016 - 05:03
Normal topic What is the best way to sum up values in __m256 ?
by zlw
Mon, 09/26/2011 - 16:21 5
by sirrida
Tue, 09/27/2011 - 12:38
Normal topic AVX Base and Turbo Frequencies on non E5 CPUs
by Andrew L.
Mon, 10/19/2015 - 16:22 5
by iliyapolak
Fri, 12/18/2015 - 12:33
Normal topic puzzled by developer manuel
by jvava
Sun, 02/15/2009 - 00:54 5
by jvava
Sat, 02/21/2009 - 19:17
Normal topic Intel® Software Development Emulator, Release 5.38
by Mark Charney (Intel)
Fri, 01/04/2013 - 09:25 5
by Sergey Kostrov
Thu, 02/21/2013 - 18:50
New posts
No new posts
Hot topic with new posts
Hot topic without new posts
Sticky topic
Locked topic
For more complete information about compiler optimizations, see our Optimization Notice.