Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication

Topic / Topic starter Post date Replies Last Post
Normal topic Complex Matrix alignement
by unrue
Mon, 07/12/2010 - 08:47 5
by Arthur Moroz
Mon, 07/12/2010 - 08:47
Normal topic Rotate shift in AVX and SSE
by Pourya Shirazian
Thu, 11/10/2011 - 13:57 2
by jimdempseyatthecove
Sat, 11/12/2011 - 14:27
Normal topic Gather of byte/word with avx2
by derek N.
Fri, 09/06/2013 - 13:35 2
by perfwise
Sun, 10/13/2013 - 08:19
Normal topic About 256 bit registers
by gabest
Fri, 12/19/2008 - 21:31 5
by Igor Levicki
Thu, 01/01/2009 - 01:07
Normal topic SIMD itoa implementation
by akhin
Mon, 03/28/2011 - 14:35 1
by akhin
Mon, 03/28/2011 - 14:38
Normal topic load and loadu - alignment
by Christian M.
Tue, 01/08/2013 - 04:57 3
by Christian M.
Fri, 01/11/2013 - 07:21
Normal topic pin-2.14-71313 and WinSock library
by Pavel R.
Mon, 03/23/2015 - 10:56 7
by Pavel R.
Wed, 03/25/2015 - 03:20
Normal topic Why only CS, IP and EFLAGS are saved while interrupt??
by cgopi24
Fri, 09/25/2009 - 09:29 1
by Shih Kuo (Intel)
Fri, 10/16/2009 - 01:34
Normal topic Processor Cycle and Execution Time of Instruction
by dave1024
Sun, 05/02/2010 - 22:59 2
by Roman Dementiev...
Sun, 05/02/2010 - 23:02
Normal topic Penealty when mixing AVX and SSE
by maxmus
Thu, 06/16/2011 - 09:15 3
by Brijender Bhart...
Thu, 06/16/2011 - 13:58
Normal topic Use pointer to __m256 or use _mm256_load_ps
by Nadav S.
Thu, 06/06/2013 - 04:37 10
by jimdempseyatthecove
Mon, 06/10/2013 - 04:40
Normal topic CPU temperature Pentium 4
by abdekker
Wed, 06/18/2008 - 10:07 1
by Igor Levicki
Thu, 07/10/2008 - 21:01
Normal topic MSR at 0x19c bit 2: Indicator of Throttling?
by ryancox
Mon, 11/15/2010 - 11:06 1
by ryancox
Mon, 11/15/2010 - 15:10
Normal topic Is there an error in Operation pseudo-code for FSIN instruction?
by Sergey Kostrov
Mon, 07/23/2012 - 16:20 1
by iliyapolak
Mon, 07/23/2012 - 17:07
Normal topic Strange IPC behavior
by Patrick P.
Sun, 10/19/2014 - 13:11 5
by Patrick P.
Tue, 10/21/2014 - 04:44
Normal topic quad core q9550 question
by threetwo
Wed, 07/08/2009 - 09:47 0
by threetwo
Wed, 07/08/2009 - 09:47
Normal topic Intel(R) SDE 2.94 release announcement
by Mark Charney (Intel)
Thu, 12/31/2009 - 13:07 6
by twilkens
Tue, 02/02/2010 - 08:19
Normal topic No speedup AVX over SSE
by nik0las
Sun, 09/02/2012 - 22:45 6
by Tim Prince
Fri, 09/14/2012 - 13:38
Normal topic Suggestion about memory-access-signaling mechanism
by Luchezar B.
Sat, 11/29/2014 - 03:48 3
by Luchezar B.
Thu, 12/11/2014 - 10:58
Normal topic Generating Prefetch Instructions in AVX code...
by twilkens
Thu, 07/30/2009 - 10:49 5
by Martyn Corden (...
Tue, 08/04/2009 - 11:40
Normal topic Can MPI based application be run on SDE ?
by jnzhoun
Thu, 01/28/2010 - 23:44 3
by jnzhoun
Thu, 01/28/2010 - 23:44
Normal topic Proposal: Push effective address
by sirrida
Wed, 05/11/2011 - 14:51 0
by sirrida
Wed, 05/11/2011 - 14:51
Normal topic Missing instruction in SSE: PSLLDQ with _bit_ shift amount?
by geofflangdale
Thu, 02/28/2008 - 15:33 4
by happyIntelCamper
Thu, 02/28/2008 - 15:33
Normal topic i need intel motherboard drivers!
by paydayloans
Thu, 09/09/2010 - 14:35 1
by Thomas Willhalm...
Fri, 09/10/2010 - 06:43
Normal topic A problem of iret instruction description in Intel 64 and IA-32 Architectures Software Developers Manual
by Jingguo Yao
Wed, 04/25/2012 - 23:41 1
by Shih Kuo (Intel)
Fri, 04/27/2012 - 14:54
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For more complete information about compiler optimizations, see our Optimization Notice.