Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
This is a peer forum for developers using Intel® technology. Response times vary depending on the complexity of your issue.
Private messages can only be initiated by Intel employees and members of the Intel® Black Belt Developer program.
Topic / Topic starter Post date Replies Last Post
Normal topic Intel(R) Software Development Emulator 5.31 released
by Mark Charney (Intel)
Fri, 11/02/2012 - 10:27 2
by Mark Charney (Intel)
Fri, 11/02/2012 - 18:32
Normal topic Int64 <-> double conversion with SSE?
by pvercello
Sat, 06/07/2008 - 02:33 6
by wmula
Fri, 06/13/2008 - 17:50
Normal topic How to clear the upper 128 bits of __m256 value?
by Vladimir Sedach
Mon, 01/27/2014 - 04:47 8
by andysem
Thu, 04/10/2014 - 07:25
Normal topic SSE intsruction _mm_insert_epi32
by inteleverywhere
Tue, 07/13/2010 - 04:51 4
by inteleverywhere
Tue, 07/13/2010 - 04:51
Normal topic Addressing is slow
by 唐黎 唐.
Wed, 11/14/2012 - 16:19 2
by Sergey Kostrov
Thu, 11/15/2012 - 07:30
Normal topic Anyone thinking of setting low-width integars with high-width integars?
by kalven
Mon, 06/16/2008 - 01:56 2
by kalven
Thu, 06/19/2008 - 18:52
Normal topic Instruction set extensions programming reference, revision 18
by Mark Charney (Intel)
Tue, 02/18/2014 - 05:55 2
by Mark Charney (Intel)
Fri, 06/06/2014 - 20:30
Normal topic PUSH instruction in 64 bit mode
by logicman112
Sat, 07/17/2010 - 00:20 2
by logicman112
Sat, 07/17/2010 - 00:20
Normal topic Documentation suggestion
by jimdempseyatthecove
Fri, 02/06/2009 - 07:15 1
by Shih Kuo (Intel)
Fri, 02/06/2009 - 07:15
Normal topic Cannnot change IA32_PERF_CTL value: it gets overwritten by the operating system
by Yuna H.
Tue, 12/02/2014 - 08:43 4
by Yuna H.
Thu, 12/04/2014 - 14:44
Normal topic Processor models supporting the SHA extensions?
by areid
Sat, 10/10/2015 - 01:23 2
by areid
Sat, 10/10/2015 - 13:46
Normal topic Error in Unhalted.CPU.CLK cycles event
by gokussj9
Mon, 10/04/2010 - 08:33 2
by Roman Dementiev...
Mon, 10/04/2010 - 08:33
Normal topic Do the Intel 11.1 compilers support AVX?
by twilkens
Wed, 06/24/2009 - 17:08 5
by twilkens
Wed, 06/24/2009 - 17:08
Normal topic Encodings for instructions with {sae} are unclear in the doc
by Michael R.
Wed, 07/22/2015 - 12:23 4
by Mark Charney (Intel)
Wed, 07/22/2015 - 14:05
Hot topic Quad precision floating point arithmetic with SSE/AVX?
by Mikalai Kisiali...
Thu, 05/26/2011 - 19:07 39
by Shih Kuo (Intel)
Mon, 08/06/2012 - 07:37
Hot topic Will a vector version of rol be supported in the future
by STEPHEN H.
Thu, 06/16/2016 - 06:55 16
by jimdempseyatthecove
Fri, 08/05/2016 - 07:54
Normal topic AVX slowdown using multicores
by gilrgrgmail.com
Sun, 04/17/2011 - 01:21 3
by jimdempseyatthecove
Tue, 04/26/2011 - 07:56
Normal topic Understanding my Benchmarks
by Matthias Kretz
Tue, 11/10/2009 - 08:13 5
by Matthias Kretz
Tue, 11/10/2009 - 08:13
Normal topic Intel(R) Software development emulator 4.46 released
by Mark Charney (Intel)
Fri, 12/16/2011 - 07:12 2
by Mark Charney (Intel)
Fri, 11/02/2012 - 13:24
Normal topic Slightly OT, but maybe somebody has an idea.
by Alexander L.
Mon, 02/06/2017 - 16:11 7
by andysem
Tue, 02/07/2017 - 07:56
Hot topic Comparing scalar, SSE and AVX basics....poor performances ??
by Joaquin Tarraga
Wed, 06/06/2012 - 01:28 21
by Max Locktyukhin...
Mon, 06/25/2012 - 20:44
Normal topic Costs of scatter store
by Johannes P.
Mon, 09/04/2017 - 11:28 2
by Anil M.
Sat, 09/30/2017 - 04:29
Normal topic Instruction set extensions programming reference, revision 15
by Mark Charney (Intel)
Tue, 07/23/2013 - 10:45 0
by Mark Charney (Intel)
Tue, 07/23/2013 - 10:45
Normal topic Has Fused Multiply-Add been already implemented on Nehaelm?
by HPC-TAMU
Thu, 05/20/2010 - 15:37 13
by c0d1f1ed
Wed, 07/06/2011 - 23:22
Normal topic tsod polling in Sandy Bridge
by Brian Stark
Wed, 01/16/2013 - 10:30 1
by Saptarshi S.
Sat, 11/16/2013 - 12:49
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No new posts
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For more complete information about compiler optimizations, see our Optimization Notice.