Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
This is a peer forum for developers using Intel® technology. Response times vary depending on the complexity of your issue.
Private messages can only be initiated by Intel employees and members of the Intel® Black Belt Developer program.
Topic / Topic starter Post date Replies Last Post
Normal topic Has Fused Multiply-Add been already implemented on Nehaelm?
by HPC-TAMU
Thu, 05/20/2010 - 15:37 13
by c0d1f1ed
Wed, 07/06/2011 - 23:22
Normal topic Instruction set extensions programming reference, revision 18
by Mark Charney (Intel)
Tue, 02/18/2014 - 05:55 2
by Mark Charney (Intel)
Fri, 06/06/2014 - 20:30
Normal topic tsod polling in Sandy Bridge
by Brian Stark
Wed, 01/16/2013 - 10:30 1
by Saptarshi S.
Sat, 11/16/2013 - 12:49
Normal topic avx on corei7
by Ravi Managuli
Wed, 08/04/2010 - 09:43 4
by Ravi Managuli
Wed, 08/04/2010 - 12:20
Normal topic Cannnot change IA32_PERF_CTL value: it gets overwritten by the operating system
by Yuna H.
Tue, 12/02/2014 - 08:43 4
by Yuna H.
Thu, 12/04/2014 - 14:44
Normal topic Questions about AVX
by Igor Levicki
Fri, 04/04/2008 - 11:11 8
by Igor Levicki
Fri, 04/04/2008 - 11:11
Normal topic What is (name withheld)?
by andysem
Wed, 01/20/2016 - 00:48 2
by iliyapolak
Thu, 01/21/2016 - 01:55
Normal topic Clock cycles per instruction?
by christian.convey
Wed, 12/01/2010 - 05:16 8
by 0xr
Wed, 12/01/2010 - 05:16
Normal topic Encodings for instructions with {sae} are unclear in the doc
by Michael R.
Wed, 07/22/2015 - 12:23 4
by Mark Charney (Intel)
Wed, 07/22/2015 - 14:05
Normal topic Low Precision VFNMADDSS on SDE(AVX Emulator)
by wowtiger
Tue, 11/11/2008 - 23:36 5
by gabest
Tue, 11/11/2008 - 23:36
Normal topic AVX trial facility
by magicfoot
Sat, 07/02/2011 - 12:59 1
by sirrida
Sat, 07/02/2011 - 12:59
Normal topic How is the sign bit represented in memory and in the CPU?
by Marcus J.
Tue, 10/04/2016 - 09:34 2
by Marcus J.
Wed, 10/05/2016 - 21:44
Normal topic Defining "Disassembly of section .plt" in C/C++ code
by srimks
Wed, 05/13/2009 - 00:12 5
by Melanie Blower ...
Fri, 05/15/2009 - 07:41
Normal topic Intrinsic guide 2.6 error in documentation
by gilgil
Thu, 02/09/2012 - 00:29 4
by gilgil
Thu, 05/10/2012 - 03:03
Normal topic RTM abort status 'RETRY'?
by Oliver K.
Thu, 04/13/2017 - 01:53 2
by Oliver K.
Thu, 04/13/2017 - 05:16
Normal topic Problem with SSE2 code
by ijjys
Fri, 09/18/2009 - 11:06 0
by ijjys
Fri, 09/18/2009 - 11:06
Normal topic uops? IA32/Intel64 vs. micro-ops?
by arrazem
Wed, 01/27/2010 - 20:31 4
by Max Locktyukhin...
Wed, 01/27/2010 - 20:31
Normal topic Instruction set extensions programming reference, revision 15
by Mark Charney (Intel)
Tue, 07/23/2013 - 10:45 0
by Mark Charney (Intel)
Tue, 07/23/2013 - 10:45
Normal topic Missed optimization opportunities using dvec.h
by jimdempseyatthecove
Wed, 08/08/2012 - 08:21 1
by Zitzlsberger, G...
Thu, 08/09/2012 - 07:36
Normal topic Array Registers
by Daniel F.
Sat, 11/18/2017 - 02:44 1
by jimdempseyatthecove
Sat, 11/18/2017 - 07:25
Normal topic Performance Counters to measure L1, L2 Cache Misses
by xift
Mon, 06/21/2010 - 00:59 11
by k_sarnath
Mon, 06/21/2010 - 01:02
Normal topic Broken links for MPX GCC version on the Intel server?
by c_43
Mon, 06/02/2014 - 09:15 3
by c_43
Fri, 10/10/2014 - 06:40
Normal topic Documentation of SSE versions
by Christian M.
Thu, 02/21/2013 - 02:10 7
by Christian M.
Sat, 03/09/2013 - 03:57
Normal topic Intell compiler 11.1 and AVX
by Ravi Managuli
Wed, 09/08/2010 - 11:48 7
by Kit Chung (Intel)
Tue, 09/14/2010 - 14:49
Normal topic SSE ucomiss/comiss strange behavior
by Naer J.
Wed, 02/04/2015 - 21:25 7
by Naer J.
Thu, 02/05/2015 - 13:57
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For more complete information about compiler optimizations, see our Optimization Notice.