Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
Intel monitors this forum Monday – Friday, 09:00 – 17:00 Pacific Time (GMT –7:00). Depending on the amount of research we need to do to track down the answer, it may take a day or two for us to respond.
Topic / Topic startersort descending Post date Replies Last Post
Normal topic Problem with _mm_load_si128
by pranith
Thu, 10/11/2012 - 18:07 3
by Sergey Kostrov
Tue, 11/13/2012 - 17:08
Normal topic Problems encountred during vectorization of code using SSE intrinsics
by priyanka06
Mon, 07/23/2012 - 08:14 2
by jimdempseyatthecove
Sun, 09/09/2012 - 17:15
Normal topic PROBLEMS running SDE when submitting request via pbs script on a cluster
by Rohit G.
Wed, 05/18/2016 - 05:45 9
by Rohit G.
Wed, 05/18/2016 - 07:23
Normal topic Processing of data in SSE/AVX/AVX2
by Samuel Š.
Thu, 10/30/2014 - 04:58 3
by Tim P.
Sun, 11/23/2014 - 04:16
Hot topic Processing of data in SSE/AVX/AVX2
by Samuel Š.
Thu, 10/30/2014 - 04:58 20
by iliyapolak
Sat, 11/08/2014 - 10:40
Normal topic Processor Cycle and Execution Time of Instruction
by dave1024
Sun, 05/02/2010 - 22:59 2
by Roman Dementiev...
Sun, 05/02/2010 - 23:02
Normal topic Processor models supporting the SHA extensions?
by areid
Sat, 10/10/2015 - 01:23 2
by areid
Sat, 10/10/2015 - 13:46
Normal topic Processor Trace decoding support library for Atom
by Daniel L.
Mon, 07/06/2015 - 23:26 0
by Daniel L.
Mon, 07/06/2015 - 23:26
Normal topic Prologue & Epilogue Help
by srimks
Mon, 08/10/2009 - 01:38 0
by srimks
Mon, 08/10/2009 - 01:38
Normal topic Proposal: Extended setcc
by sirrida
Wed, 05/11/2011 - 15:42 2
by sirrida
Thu, 05/12/2011 - 07:51
Normal topic Proposal: mov small constant
by sirrida
Fri, 05/13/2011 - 00:43 3
by c0d1f1ed
Sun, 05/15/2011 - 17:27
Normal topic Proposal: Push effective address
by sirrida
Wed, 05/11/2011 - 14:51 0
by sirrida
Wed, 05/11/2011 - 14:51
Normal topic psubw code gave wrong result
by Smart Lubobya
Tue, 07/13/2010 - 04:47 1
by neni
Tue, 07/13/2010 - 04:47
Normal topic PTEST improvement?
by Matthias Kretz
Tue, 11/24/2009 - 00:59 1
by Max Locktyukhin...
Tue, 11/24/2009 - 00:59
Hot topic Purpose of CPUID Deterministic Cache Parameters Leaf
by Samuel M.
Mon, 03/25/2013 - 17:56 16
by iliyapolak
Tue, 04/02/2013 - 00:23
Normal topic PUSH and POP of XMM/YMM registers
by srinivasu
Wed, 06/18/2014 - 04:57 8
by iliyapolak
Thu, 06/19/2014 - 05:42
Normal topic PUSH instruction in 64 bit mode
by logicman112
Sat, 07/17/2010 - 00:20 2
by logicman112
Sat, 07/17/2010 - 00:20
Normal topic puzzled by developer manuel
by jvava
Sun, 02/15/2009 - 00:54 5
by jvava
Sat, 02/21/2009 - 19:17
Normal topic Python Programming on Windows
by jeremy g.
Mon, 06/06/2016 - 11:28 1
by Tim P.
Tue, 06/07/2016 - 06:57
Hot topic Q on memory comparison optimization (Page: 1, 2)
by Ravi K.
Fri, 04/24/2015 - 12:34 51
by andysem
Thu, 10/01/2015 - 03:29
Normal topic Q&A: RDTSC to measure performance of small # of FP calculations
by Intel Software ...
Tue, 11/14/2006 - 22:30 4
by Intel Software ...
Fri, 08/31/2007 - 15:09
Normal topic quad core q9550 question
by threetwo
Wed, 07/08/2009 - 09:47 0
by threetwo
Wed, 07/08/2009 - 09:47
Normal topic Quad precision ?
by tux456
Thu, 08/28/2008 - 08:10 2
by tux456
Thu, 08/28/2008 - 12:54
Hot topic Quad precision floating point arithmetic with SSE/AVX?
by Mikalai Kisiali...
Thu, 05/26/2011 - 19:07 39
by Shih Kuo (Intel)
Mon, 08/06/2012 - 07:37
Normal topic Question about CRC32 instruction polynomial
by Igor Levicki
Tue, 05/27/2008 - 10:29 5
by doug.mtview
Fri, 08/14/2009 - 17:36
New posts
No new posts
Hot topic with new posts
Hot topic without new posts
Sticky topic
Locked topic
For more complete information about compiler optimizations, see our Optimization Notice.