Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX, a security technology designed for developers wanting to protect select application code and data from disclosure or modification
Intel monitors this forum Monday – Friday, 09:00 – 17:00 Pacific Time (GMT –7:00). Depending on the amount of research we need to do to track down the answer, it may take a day or two for us to respond.
Topic / Topic starter Post date Repliessort descending Last Post
Normal topic IRET Pseudo-code Bug
by Philip S.
Thu, 07/23/2015 - 07:46 7
by Mark Charney (Intel)
Thu, 10/15/2015 - 11:56
Normal topic Is it ok to create an array of _m256i
by Martin S.
Sun, 05/10/2015 - 07:07 7
by Christian M.
Wed, 05/20/2015 - 00:33
Normal topic Intel Intrinsic Guide problem
by foxtoxer
Mon, 12/26/2011 - 06:15 7
by Patrick Konsor ...
Mon, 02/13/2012 - 09:59
Normal topic How to convert three 8-bit 1-channel images to a 24-bit three channels image using SSE
by softwarebee
Mon, 05/10/2010 - 05:26 7
by softwarebee
Mon, 05/10/2010 - 05:27
Normal topic SSE/SSE2 INTRINSICS CODES
by Smart Lubobya
Sat, 05/29/2010 - 07:09 7
by Thomas Willhalm...
Wed, 07/07/2010 - 01:57
Normal topic Additional instructions suggestion
by c0d1f1ed
Mon, 04/28/2008 - 14:43 7
by Agner
Wed, 08/06/2008 - 02:37
Normal topic SSE ucomiss/comiss strange behavior
by Naer J.
Wed, 02/04/2015 - 21:25 7
by Naer J.
Thu, 02/05/2015 - 13:57
Normal topic pin-2.14-71313 and WinSock library
by Pavel R.
Mon, 03/23/2015 - 10:56 7
by Pavel R.
Wed, 03/25/2015 - 03:20
Normal topic AVX2 support in IACA
by bronxzv
Sat, 01/14/2012 - 04:38 7
by Patrick Konsor ...
Thu, 02/02/2012 - 09:40
Normal topic SSE instruction error
by inteleverywhere
Mon, 07/12/2010 - 00:38 7
by Arthur Moroz
Mon, 07/12/2010 - 00:38
Normal topic Intel SDE and PIN doesn't work on Win10 on a VS2015 compiled app
by rtfss1gmail.com
Sun, 09/06/2015 - 08:04 7
by Albert g.
Mon, 01/25/2016 - 13:12
Normal topic Intell compiler 11.1 and AVX
by Ravi Managuli
Wed, 09/08/2010 - 11:48 7
by Kit Chung (Intel)
Tue, 09/14/2010 - 14:49
Normal topic sse2 intrinsic equivalent
by Smart Lubobya
Mon, 08/16/2010 - 09:06 7
by neni
Fri, 09/03/2010 - 15:52
Normal topic Updated Intel® Software Development Emulator
by Mark Charney (Intel)
Sun, 07/20/2014 - 06:13 7
by andysem
Tue, 11/04/2014 - 14:12
Normal topic Is there any course or example for SSE/MMX beginer ?
by Gaiger Chen
Wed, 11/17/2010 - 19:34 7
by Taronyu
Fri, 11/19/2010 - 05:50
Normal topic Assignment macro-op fusion
by c0d1f1ed
Fri, 03/18/2011 - 01:22 7
by sirrida
Mon, 09/26/2011 - 12:02
Normal topic Why this AVX code is slower than SSE?
by zlw
Wed, 09/28/2011 - 21:36 7
by zlw
Tue, 11/08/2011 - 11:09
Normal topic Influence of random noise factors on CPU accuracy
by iliyapolak
Sat, 01/05/2013 - 23:09 7
by iliyapolak
Wed, 02/06/2013 - 22:19
Normal topic Need help: Why my avx code is slower than SSE code?
by Chen S.
Sun, 06/08/2014 - 04:38 8
by emmanuel.attia
Mon, 06/16/2014 - 09:45
Normal topic code optimization and vtune
by Zhiyong Z.
Tue, 01/12/2016 - 14:03 8
by iliyapolak
Thu, 01/14/2016 - 09:51
Normal topic Cache Optimization
by xift
Thu, 05/06/2010 - 03:48 8
by Thomas Willhalm...
Thu, 05/06/2010 - 03:48
Normal topic Core 2 MSR register documentation
by elmo234
Tue, 06/17/2008 - 10:24 8
by yuhong2
Mon, 02/01/2010 - 20:48
Normal topic Poor Code Gen of FMA3 instructions in SPEC FP 06 using Intel 14.0.0 compiler suite
by perfwise
Wed, 10/02/2013 - 07:10 8
by perfwise
Fri, 10/04/2013 - 12:04
Normal topic Array of _m128d values as function argument
by n.anastop
Tue, 03/19/2013 - 06:43 8
by iliyapolak
Fri, 03/22/2013 - 05:42
Normal topic PUSH and POP of XMM/YMM registers
by srinivasu
Wed, 06/18/2014 - 04:57 8
by iliyapolak
Thu, 06/19/2014 - 05:42
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For more complete information about compiler optimizations, see our Optimization Notice.