Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
Intel monitors this forum Monday – Friday, 09:00 – 17:00 Pacific Time (GMT –7:00). Depending on the amount of research we need to do to track down the answer, it may take a day or two for us to respond.
Topic / Topic starter Post date Replies Last Post
Normal topic [ACPI] Processor Register Block access
by medinad
Thu, 04/23/2009 - 00:42 2
by medinad
Thu, 04/23/2009 - 00:42
Normal topic Is there an Intel SDK that emulates SSE4.x and\\or AVX instruction sets?
by Sergey Kostrov
Thu, 12/22/2011 - 17:36 2
by Sergey Kostrov
Fri, 12/23/2011 - 05:40
Normal topic Intel manual has some mistakes
by logicman112
Sat, 06/26/2010 - 21:01 1
by logicman112
Sat, 06/26/2010 - 21:01
Normal topic Alignment requirements for _mm256_maskload_pd
by Stephen G.
Mon, 05/11/2015 - 00:41 7
by Christian M.
Wed, 05/20/2015 - 00:26
Normal topic Efficient ways to count setted bits in bytes/words?
by q w.
Tue, 01/22/2013 - 18:48 9
by Sergey Kostrov
Fri, 01/25/2013 - 07:15
Normal topic ssse3+ shuffle instruction
by mustache_marc
Thu, 02/24/2011 - 02:38 2
by denbianh
Thu, 02/24/2011 - 02:38
Hot topic IPP causes invalid opcode exception at h9_ippsFFTGetSize_C_32fc
by Beni F.
Tue, 06/25/2013 - 06:17 29
by Beni F.
Thu, 06/27/2013 - 10:02
Normal topic How to build serial communication with Intel Galileo ?
by PENGSHEN Y.
Thu, 01/21/2016 - 18:02 4
by PENGSHEN Y.
Mon, 01/25/2016 - 15:11
Normal topic Check if a floating point is actually an Integer
by anujgarg2004gma...
Wed, 01/07/2009 - 09:41 9
by Igor Levicki
Wed, 01/07/2009 - 09:41
Normal topic SSE/AVX on multicore
by magicfoot
Wed, 07/13/2011 - 11:51 2
by bradjordan111
Mon, 09/12/2011 - 06:29
Normal topic Cycle counts of the new Westmere instructions
by Cryptographer
Tue, 04/13/2010 - 00:10 2
by neni
Tue, 04/13/2010 - 00:10
Hot topic Indirect Bit Indexing and Set
by Alexander L.
Mon, 12/15/2014 - 07:50 44
by bronxzv
Mon, 12/22/2014 - 17:29
Normal topic About the override of core frequency
by shihui929
Fri, 09/25/2009 - 11:08 2
by shihui929
Fri, 09/25/2009 - 11:08
Normal topic No speedup AVX over SSE
by nik0las
Sun, 09/02/2012 - 22:45 6
by Tim P.
Fri, 09/14/2012 - 13:38
Normal topic __m128 array becomes unaligned with IC optimization
by Taylor IoT Kidd
Fri, 05/07/2010 - 15:43 5
by Igor Levicki
Fri, 05/07/2010 - 15:43
Normal topic _mm256_blend_epi16 doesn't work as documented
by Jeff D.
Wed, 12/31/2014 - 11:39 4
by bronxzv
Thu, 01/01/2015 - 04:09
Normal topic how to turn off out-of-order execution in Intel processor
by ddmetro
Sun, 10/25/2009 - 14:32 13
by jimdempseyatthecove
Mon, 09/01/2014 - 09:24
Hot topic Synchronizing Time Stamp Counter (Page: 1, 2)
by Roman Oderov
Mon, 10/29/2012 - 11:30 76
by Sergey Kostrov
Tue, 05/21/2013 - 07:07
Normal topic Is there any course or example for SSE/MMX beginer ?
by Gaiger Chen
Wed, 11/17/2010 - 19:34 7
by Taronyu
Fri, 11/19/2010 - 05:50
Normal topic SDE failure trying to look at "chrome"
by perfwise
Sun, 04/14/2013 - 19:26 2
by Ady Tal (Intel)
Wed, 04/24/2013 - 00:38
Normal topic What is behavior of LD + OP instruction with register source and EVEX.b = 1?
by Michael R.
Thu, 09/10/2015 - 00:44 0
by Michael R.
Thu, 09/10/2015 - 00:44
Normal topic Microinstruction Format
by dargueta
Sat, 07/12/2008 - 22:41 4
by dargueta
Tue, 07/15/2008 - 19:50
Normal topic AVX sometimes slower than SSE
by Eric Nuckols
Wed, 05/18/2011 - 12:22 8
by bronxzv
Fri, 05/20/2011 - 17:20
Normal topic mul instruction latency
by tthsqe
Sat, 01/09/2010 - 22:52 3
by Max Locktyukhin...
Sat, 01/09/2010 - 22:52
Normal topic Updated Intel® Software Development Emulator
by Mark Charney (Intel)
Sun, 07/20/2014 - 06:13 7
by andysem
Tue, 11/04/2014 - 14:12
New posts
No new posts
Hot topic with new posts
Hot topic without new posts
Sticky topic
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For more complete information about compiler optimizations, see our Optimization Notice.