Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication

Topic / Topic starter Post date Replies Last Postsort ascending
Normal topic New SIMDLEA Instruction?
by w0wtiger
Sun, 01/11/2009 - 00:52 2
by Max Locktyukhin...
Sun, 01/11/2009 - 00:52
Normal topic Check if a floating point is actually an Integer
by anujgarg2004gma...
Wed, 01/07/2009 - 09:41 9
by Igor Levicki
Wed, 01/07/2009 - 09:41
Normal topic About 256 bit registers
by gabest
Fri, 12/19/2008 - 21:31 5
by Igor Levicki
Thu, 01/01/2009 - 01:07
Normal topic pmovzx/pmovsx
by dark_shikari
Sun, 10/12/2008 - 05:36 14
by Igor Levicki
Sat, 12/27/2008 - 19:36
Normal topic Diagnostic testing of CPU and Support Device Architectures
by daryl_langley_4
Mon, 12/01/2008 - 17:06 1
by Thai Le (Intel)
Tue, 12/09/2008 - 13:51
Normal topic rdtscl measures less clock cycles on AMD
by walla71
Mon, 12/01/2008 - 07:48 1
by Tim Prince
Mon, 12/01/2008 - 08:37
Normal topic Help: Vectorization, x87 & SSE2
by srimks
Mon, 12/01/2008 - 04:06 10
by Michael Stoner ...
Mon, 12/01/2008 - 04:06
Normal topic AVX alignment requirement
by Tim Prince
Sat, 11/15/2008 - 16:00 1
by Mark Buxton (Intel)
Wed, 11/26/2008 - 13:10
Normal topic AMX Analysis - GNU & Intel
by srimks
Sat, 11/08/2008 - 06:14 1
by Tim Prince
Wed, 11/12/2008 - 23:12
Normal topic Low Precision VFNMADDSS on SDE(AVX Emulator)
by wowtiger
Tue, 11/11/2008 - 23:36 5
by gabest
Tue, 11/11/2008 - 23:36
Normal topic Add Instruction PROTD
by sc00bz
Wed, 10/29/2008 - 07:16 2
by Igor Levicki
Thu, 11/06/2008 - 17:16
Normal topic Detecting Nehalem CPU
by dark_shikari
Fri, 10/10/2008 - 15:24 5
by Shih Kuo (Intel)
Fri, 10/17/2008 - 18:26
Normal topic andps vs. andpd vs. pand
by c0d1f1ed
Fri, 09/19/2008 - 04:23 6
by emmetcaulfield
Wed, 10/08/2008 - 05:19
Normal topic Timing of LPT-port
by ugtehservis
Wed, 09/03/2008 - 23:36 1
by Igor Levicki
Tue, 09/30/2008 - 17:35
Normal topic Forums will be read-only 09/24 10PM PST to 09/25 12PM PST
by Intel Software ...
Mon, 09/22/2008 - 11:46 0
by Intel Software ...
Mon, 09/22/2008 - 11:46
Normal topic FMA now an extension of AVX?
by gabest
Wed, 08/27/2008 - 23:58 1
by Thai Le (Intel)
Mon, 09/08/2008 - 09:32
Normal topic Quad precision ?
by tux456
Thu, 08/28/2008 - 08:10 2
by tux456
Thu, 08/28/2008 - 12:54
Normal topic About INstruction Decoder in P4
by biplabraut
Wed, 08/13/2008 - 00:11 1
by Thai Le (Intel)
Wed, 08/13/2008 - 00:11
Normal topic Intel's IA32/64 bit architecture's instruction set encoding
by postaquestion
Thu, 04/24/2008 - 16:45 4
by Agner
Wed, 08/06/2008 - 02:50
Normal topic Additional instructions suggestion
by c0d1f1ed
Mon, 04/28/2008 - 14:43 7
by Agner
Wed, 08/06/2008 - 02:37
Normal topic P4 stalls for >240 uSec
by stevek999
Fri, 07/11/2008 - 06:28 6
by Igor Levicki
Tue, 08/05/2008 - 05:18
Normal topic SSE 4.2 on which processors?
by md_intel
Thu, 07/31/2008 - 23:08 3
by Thai Le (Intel)
Thu, 07/31/2008 - 23:08
Normal topic Consecutive load operations results problem
by biplabraut
Tue, 07/29/2008 - 23:34 2
by biplabraut
Tue, 07/29/2008 - 23:34
Normal topic adding or comapring 8 bit unsigned data in XMM register
by biplabraut
Mon, 07/28/2008 - 23:17 3
by biplabraut
Mon, 07/28/2008 - 23:17
Normal topic Extracting XMM register elements gives compilation error
by biplabraut
Mon, 07/28/2008 - 00:31 3
by Igor Levicki
Mon, 07/28/2008 - 00:31
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For more complete information about compiler optimizations, see our Optimization Notice.