Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
This is a peer forum for developers using Intel® technology. Response times vary depending on the complexity of your issue.
Private messages can only be initiated by Intel employees and members of the Intel® Black Belt Developer program.
Topic / Topic starter Post date Replies Last Post
Hot topic To use FPU
by GHui
Fri, 06/28/2013 - 02:13 23
by GHui
Thu, 07/11/2013 - 09:27
Hot topic Data source for intrinsics guide
by Evan N.
Mon, 04/24/2017 - 19:28 16
by Sergey Kostrov
Thu, 05/04/2017 - 14:51
Normal topic __libm_sse2_sincos
by srimks
Mon, 07/13/2009 - 09:32 9
by srimks
Mon, 07/13/2009 - 20:47
Normal topic VEX prefix and ymm state saving support
by yuhong2
Thu, 12/03/2009 - 23:19 1
by Brijender Bhart...
Fri, 12/04/2009 - 09:00
Normal topic movups and movupd movaps and movapd
by zhangxiuxia
Tue, 02/21/2012 - 06:08 4
by Max Locktyukhin...
Wed, 02/22/2012 - 18:25
Normal topic FMA Support
by rmendes.silva
Sun, 03/23/2014 - 12:20 3
by iliyapolak
Mon, 03/24/2014 - 10:46
Normal topic How does address be mapped onto a memory bank
by zhangyihere
Tue, 12/01/2009 - 02:04 0
by zhangyihere
Tue, 12/01/2009 - 07:30
Normal topic Are FMA instructions supported with the intel compiler?
by rlaouenan
Tue, 06/01/2010 - 04:17 0
by rlaouenan
Tue, 06/01/2010 - 04:17
Normal topic 256 bit subtraction
by garfield-lewis
Wed, 10/03/2012 - 11:17 1
by styc
Sun, 10/14/2012 - 19:49
Normal topic pmovzxbd using memory operands
by Christopher H.
Tue, 12/16/2014 - 17:07 5
by bronxzv
Thu, 12/18/2014 - 06:26
Normal topic Behavior of some convert instructions with W=1 in non-64-bit mode
by Michael R.
Tue, 09/01/2015 - 17:33 1
by Mark Charney (Intel)
Wed, 09/02/2015 - 04:23
Normal topic SSE2 help needed
by rheikon
Fri, 09/30/2005 - 21:36 13
by Community Admin
Mon, 10/03/2005 - 20:59
Normal topic The structure of ModR/M byte
by logicman112
Tue, 08/17/2010 - 03:50 2
by logicman112
Tue, 08/17/2010 - 03:50
Normal topic Problem in compiling SSSE3 in Ubuntu12.04LTS
by Hari K.
Mon, 03/18/2013 - 23:08 9
by Sergey Kostrov
Wed, 03/20/2013 - 05:29
Normal topic Switching to protected mode clarification
by Nathan P.
Sat, 08/01/2015 - 06:04 4
by Nathan P.
Thu, 10/01/2015 - 05:09
Normal topic TSX and PCI consistent memory
by A H.
Wed, 04/27/2016 - 00:55 9
by jimdempseyatthecove
Sat, 05/07/2016 - 11:02
Normal topic FMA now an extension of AVX?
by gabest
Wed, 08/27/2008 - 23:58 1
by Thai Le (Intel)
Mon, 09/08/2008 - 09:32
Normal topic Core2Duo: What timer is ticking under C4 ?
by zvivered
Sat, 01/01/2011 - 19:52 2
by zvivered
Sat, 01/15/2011 - 00:49
Normal topic C-State Configuration
by rdmsr64
Thu, 05/12/2011 - 04:49 0
by rdmsr64
Thu, 05/12/2011 - 04:49
Hot topic Purpose of CPUID Deterministic Cache Parameters Leaf
by Samuel M.
Mon, 03/25/2013 - 17:56 16
by iliyapolak
Tue, 04/02/2013 - 00:23
Normal topic Is xend treated as a full memory barrier?
by william l.
Fri, 01/13/2017 - 06:25 1
by McCalpin, John
Fri, 01/13/2017 - 11:24
Normal topic [ACPI] Processor Register Block access
by medinad
Thu, 04/23/2009 - 00:42 2
by medinad
Thu, 04/23/2009 - 00:42
Normal topic SSE4 is there a BigInt LIbrary?
by gbrun
Wed, 10/12/2011 - 21:03 3
by styc
Fri, 10/14/2011 - 22:35
Normal topic Is Haswell's new transactional memory 'TSX' actually slower than locking?
by Elmar
Thu, 08/29/2013 - 09:28 6
by jimdempseyatthecove
Fri, 09/06/2013 - 06:01
Normal topic Intel please update hard copy manuals @ lulu.com
by Russell Van Zandt
Mon, 07/24/2017 - 15:49 0
by Russell Van Zandt
Mon, 07/24/2017 - 15:49
New posts
No new posts
Hot topic with new posts
Hot topic without new posts
Sticky topic
Locked topic
For more complete information about compiler optimizations, see our Optimization Notice.