Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
Intel monitors this forum Monday – Friday, 09:00 – 17:00 Pacific Time (GMT –7:00). Depending on the amount of research we need to do to track down the answer, it may take a day or two for us to respond.
Topic / Topic starter Post date Replies Last Post
Normal topic where can I get the reference of pseudo-code?
by Raymond S.
Wed, 02/24/2016 - 18:27 4
by iliyapolak
Fri, 03/11/2016 - 01:57
Normal topic Microinstruction Format
by dargueta
Sat, 07/12/2008 - 22:41 4
by dargueta
Tue, 07/15/2008 - 19:50
Normal topic __m128 array becomes unaligned with IC optimization
by Taylor IoT Kidd
Fri, 05/07/2010 - 15:43 5
by Igor Levicki
Fri, 05/07/2010 - 15:43
Normal topic CPU Instruction counter register
by nuclear_scientist
Fri, 07/31/2009 - 09:37 1
by Tim P.
Fri, 07/31/2009 - 09:37
Normal topic Energy per instruction
by intc2012
Mon, 01/23/2012 - 16:57 2
by intc2012
Sun, 01/29/2012 - 03:01
Normal topic gather instructions and the size of indexs for a given base gpr size
by perfwise
Wed, 01/15/2014 - 07:18 5
by perfwise
Mon, 01/20/2014 - 04:53
Normal topic Is there any course or example for SSE/MMX beginer ?
by Gaiger Chen
Wed, 11/17/2010 - 19:34 7
by Taronyu
Fri, 11/19/2010 - 05:50
Normal topic What is behavior of LD + OP instruction with register source and EVEX.b = 1?
by Michael R.
Thu, 09/10/2015 - 00:44 0
by Michael R.
Thu, 09/10/2015 - 00:44
Normal topic Excuting time of the instruction "rdtsc" on X86
by dhbellwyc
Tue, 03/11/2008 - 06:12 4
by dhbellwyc
Tue, 03/11/2008 - 06:12
Hot topic Performance of sqrt (Page: 1, 2, 3)
by Christian M.
Fri, 02/01/2013 - 03:35 101
by Christian M.
Tue, 02/26/2013 - 01:09
Normal topic Guaranteed atomic operation clarification
by Nathan P.
Mon, 06/29/2015 - 20:52 2
by Nathan P.
Tue, 06/30/2015 - 17:26
Normal topic mul instruction latency
by tthsqe
Sat, 01/09/2010 - 22:52 3
by Max Locktyukhin...
Sat, 01/09/2010 - 22:52
Normal topic How to speed up this code?
by Alexander L.
Tue, 01/17/2017 - 16:26 0
by Alexander L.
Tue, 01/17/2017 - 16:26
Normal topic How to disable FPU on Intel Core2 Duo
by adamczez
Sat, 05/02/2009 - 03:26 1
by jancino
Sat, 05/02/2009 - 03:26
Normal topic movq doesn't work, it never move the data
by hurricanezhb
Wed, 08/03/2011 - 11:04 3
by hurricanezhb
Wed, 08/03/2011 - 11:04
Hot topic SSE4 Register-Handling
by adrian s.
Wed, 07/10/2013 - 07:58 21
by Sergey Kostrov
Thu, 07/18/2013 - 18:38
Normal topic probable mistake in documentation---please check2
by logicman112
Sun, 09/05/2010 - 02:45 2
by logicman112
Mon, 09/13/2010 - 21:20
Hot topic Synchronizing Time Stamp Counter (Page: 1, 2)
by Roman Oderov
Mon, 10/29/2012 - 11:30 76
by Sergey Kostrov
Tue, 05/21/2013 - 07:07
Normal topic _mm256_blend_epi16 doesn't work as documented
by Jeff D.
Wed, 12/31/2014 - 11:39 4
by bronxzv
Thu, 01/01/2015 - 04:09
Normal topic How to convert __m512d to __m512 using AVX512 on KNL
by Zekun Y.
Thu, 08/25/2016 - 02:42 4
by jimdempseyatthecove
Thu, 08/25/2016 - 16:18
Normal topic assembly program in itanium based systems
by rkraveesh
Tue, 01/27/2009 - 04:03 2
by forzaitalia2010
Tue, 01/27/2009 - 04:03
Normal topic AVX sometimes slower than SSE
by Eric Nuckols
Wed, 05/18/2011 - 12:22 8
by bronxzv
Fri, 05/20/2011 - 17:20
Normal topic SDE failure trying to look at "chrome"
by perfwise
Sun, 04/14/2013 - 19:26 2
by Ady Tal (Intel)
Wed, 04/24/2013 - 00:38
Normal topic psubw code gave wrong result
by Smart Lubobya
Tue, 07/13/2010 - 04:47 1
by neni
Tue, 07/13/2010 - 04:47
Hot topic AVX - Vector shifts
by ale
Sat, 12/01/2012 - 20:25 16
by rmendes.silva
Wed, 03/05/2014 - 12:23
New posts
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Hot topic with new posts
Hot topic without new posts
Sticky topic
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For more complete information about compiler optimizations, see our Optimization Notice.