Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication

Topic / Topic startersort descending Post date Replies Last Post
Normal topic Which AVX instructions are 256-bit enabled on SNB-EP?
by ron_bennett@men...
Tue, 08/09/2011 - 16:52 8
by Tim Prince
Thu, 08/11/2011 - 16:03
Normal topic Which instructions behavior differently between VMX mode and Virtual-8086 Mode
by hurricanezhb
Sat, 08/22/2009 - 04:33 0
by hurricanezhb
Sat, 08/22/2009 - 04:33
Normal topic Why "subq" as allocate by ICC-v10.0 but not as prologue, but ICC-v11.0 uses "pushq" as prologue?
by srimks
Wed, 01/21/2009 - 01:10 3
by Sergey Maslov (...
Mon, 11/02/2009 - 22:18
Normal topic Why AVX do not support real/V86 mode
by yuhong2
Thu, 04/23/2009 - 23:44 1
by Thai Le (Intel)
Thu, 04/23/2009 - 23:44
Normal topic why does _mm_mulhrs_epi16() always do biased rounding to positive infinity?
by unclejoe
Fri, 01/30/2015 - 19:25 9
by iliyapolak
Fri, 02/06/2015 - 12:07
Normal topic Why is my AVX slower than SSE?
by Shaquille W.
Tue, 06/02/2015 - 09:18 3
by Tim Prince
Wed, 06/10/2015 - 12:59
Hot topic Why no FMA in AVX in Sandy Bridge?
by Igor Levicki
Mon, 10/06/2008 - 12:56 18
by tthsqe
Sat, 09/05/2009 - 19:02
Normal topic Why only CS, IP and EFLAGS are saved while interrupt??
by cgopi24
Fri, 09/25/2009 - 09:29 1
by Shih Kuo (Intel)
Fri, 10/16/2009 - 01:34
Normal topic Why the datasheet is incomplete?
by logicman112
Sun, 09/26/2010 - 04:44 0
by logicman112
Sun, 09/26/2010 - 04:44
Normal topic Why the restricted transaction has conflict abort even run a single thread?
by zhaoguo w.
Mon, 06/24/2013 - 05:45 12
by Roman Dementiev...
Tue, 06/25/2013 - 07:17
Normal topic Why this AVX code is slower than SSE?
by zlw
Wed, 09/28/2011 - 21:36 7
by zlw
Tue, 11/08/2011 - 11:09
Normal topic Why we didn't learn about this here on the ISN first?
by Igor Levicki
Thu, 02/19/2009 - 00:17 2
by Igor Levicki
Thu, 02/19/2009 - 00:17
Normal topic Why weren't PINSR* instructions extended to 256-bits in AVX2
by perfwise
Tue, 08/27/2013 - 20:24 3
by perfwise
Fri, 08/30/2013 - 06:06
Normal topic Wierd instruction: extractps
by zhangxiuxia
Fri, 04/20/2012 - 04:33 3
by bronxzv
Sun, 05/27/2012 - 01:53
Normal topic Will AVX-512 replace the need for dedicated GPU's?
by Christopher H.
Mon, 01/13/2014 - 01:44 13
by iliyapolak
Fri, 01/24/2014 - 12:28
Normal topic with _mm256 instruction, does it matter to use -xAVX to compiler?
by zlw
Fri, 05/10/2013 - 16:21 12
by Tim Prince
Tue, 05/14/2013 - 05:02
Normal topic Working assembly example for MPX?
by c_43
Wed, 07/09/2014 - 10:58 2
by c_43
Thu, 07/10/2014 - 08:40
Normal topic x64 Intrinsic Reference
by inteleverywhere
Wed, 06/23/2010 - 22:43 3
by matthieu.darbois
Wed, 06/23/2010 - 22:43
Normal topic x64/ia64 Assemly Instructions in Code Porting
by gangti
Wed, 07/01/2009 - 20:18 3
by jimdempseyatthecove
Wed, 07/01/2009 - 20:18
Normal topic x87 and out-of-order execution
by k_sarnath
Wed, 03/31/2010 - 22:33 2
by k_sarnath
Wed, 03/31/2010 - 22:33
Normal topic Xed / Objdump errors in disassembly of Intel compiled executables...
by twilkens
Fri, 02/26/2010 - 16:56 2
by twilkens
Fri, 02/26/2010 - 16:56
Normal topic [ACPI] Processor Register Block access
by medinad
Thu, 04/23/2009 - 00:42 2
by medinad
Thu, 04/23/2009 - 00:42
Normal topic [beginner question] SSE2 / CPU and dynamic/static arrays (C) performance
by vkeller
Thu, 03/10/2011 - 02:14 2
by vkeller
Thu, 03/10/2011 - 02:14
Normal topic [Puzzle] Processor Thermal Zone and DTS Information
by Denise
Thu, 04/23/2009 - 03:37 0
by Denise
Thu, 04/23/2009 - 03:37
Normal topic [smp] Initialization
by medinad
Mon, 09/21/2009 - 08:11 0
by medinad
Mon, 09/21/2009 - 08:11
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For more complete information about compiler optimizations, see our Optimization Notice.