Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
This is a peer forum for developers using Intel® technology. Response times vary depending on the complexity of your issue.
Private messages can only be initiated by Intel employees and members of the Intel® Black Belt Developer program.
Topic / Topic starter Post date Replies Last Post
Hot topic AVX-512 expectations
by c0d1f1ed
Fri, 07/26/2013 - 23:24 29
by iliyapolak
Sun, 09/22/2013 - 23:14
Normal topic Cross processor code modification
by Sanjoy D.
Tue, 04/12/2016 - 17:09 9
by jimdempseyatthecove
Tue, 04/19/2016 - 05:31
Hot topic division sse2 intrinsic
by Smart Lubobya
Thu, 05/27/2010 - 06:50 16
by Thomas Willhalm...
Fri, 01/07/2011 - 05:33
Normal topic Compute eflags
by hunter123
Tue, 06/17/2008 - 14:00 1
by Igor Levicki
Sun, 07/27/2008 - 20:36
Normal topic float precise
by zhangxiuxia
Wed, 04/18/2012 - 20:33 5
by Sergey Kostrov
Tue, 04/24/2012 - 18:19
Normal topic Need help: Why my avx code is slower than SSE code?
by Chen S.
Sun, 06/08/2014 - 04:38 8
by emmanuel.attia
Mon, 06/16/2014 - 09:45
Normal topic AVX512 suboptimal intrinsics compilation
by jan v.
Tue, 01/03/2017 - 09:28 7
by jan v.
Sat, 01/07/2017 - 05:28
Normal topic aligniing 'btr' or its address using declspec(align(16))
by Smart Lubobya
Fri, 08/06/2010 - 05:41 8
by Brijender Bhart...
Thu, 08/12/2010 - 10:56
Normal topic reverse a PMOVMSKB instruction?
by dattrax
Mon, 02/09/2009 - 14:15 4
by Igor Levicki
Mon, 02/09/2009 - 14:15
Hot topic AVX - Vector shifts
by ale
Sat, 12/01/2012 - 20:25 16
by rmendes.silva
Wed, 03/05/2014 - 12:23
Normal topic TSX example code doesn't work
by YangHun P.
Mon, 02/23/2015 - 21:18 5
by jimdempseyatthecove
Thu, 02/26/2015 - 08:11
Normal topic Software Development Emulator With Intel TXT support
by Bhushan J.
Tue, 07/11/2017 - 06:59 2
by Bhushan J.
Wed, 07/12/2017 - 13:16
Normal topic Analyzing Segmented / Linear Address Of A Process
by reverseengineer
Thu, 12/02/2010 - 20:07 1
by Aubrey W.
Mon, 12/13/2010 - 14:51
Normal topic Can assembly function written with AVX instructions be built for running on corei7?
by satheesan
Fri, 07/03/2009 - 00:25 2
by satheesan
Sun, 07/05/2009 - 20:29
Normal topic AVX horizontal sum and store
by Christian M.
Tue, 12/11/2012 - 06:56 8
by Tim P.
Fri, 01/11/2013 - 07:54
Normal topic Intel 64 documentation bug
by Chris S.
Tue, 03/10/2015 - 17:27 1
by Mark Charney (Intel)
Tue, 03/10/2015 - 19:19
Normal topic Data conversion from scalar to vector
by Jun Y.
Mon, 07/24/2017 - 13:35 0
by Jun Y.
Mon, 07/24/2017 - 13:35
Hot topic Intel(R) SDE (emulator) release 3.88 supporting POST-32nm instructions
by Mark Charney (Intel)
Wed, 12/22/2010 - 13:38 19
by bronxzv
Mon, 01/23/2012 - 08:27
Normal topic quad core q9550 question
by threetwo
Wed, 07/08/2009 - 09:47 0
by threetwo
Wed, 07/08/2009 - 09:47
Normal topic TSC Problem
by faball
Fri, 11/27/2009 - 02:52 0
by faball
Mon, 01/11/2010 - 09:36
Normal topic Calculation of Cycles Per Instruction (CPI) for Intel processors.
by anandcta1234
Wed, 06/01/2011 - 08:24 4
by magicfoot
Wed, 06/01/2011 - 08:24
Hot topic IB gpr load latency and displacement size
by perfwise
Tue, 05/28/2013 - 06:15 15
by iliyapolak
Tue, 06/04/2013 - 22:10
Normal topic How long does a 6700K take to multiply two integers?
by Nosh N.
Fri, 11/06/2015 - 10:13 3
by iliyapolak
Tue, 12/15/2015 - 09:18
Normal topic Where to Find Intel MMX SIMD Examples
by iekpo
Thu, 02/11/2010 - 13:37 4
by iekpo
Fri, 02/19/2010 - 11:46
Normal topic SSE3 critique
by Deleted User
Fri, 08/19/2005 - 08:35 3
by Igor Levicki
Tue, 05/27/2008 - 09:59
New posts
No new posts
Hot topic with new posts
Hot topic without new posts
Sticky topic
Locked topic
For more complete information about compiler optimizations, see our Optimization Notice.