Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
Intel monitors this forum Monday – Friday, 09:00 – 17:00 Pacific Time (GMT –7:00). Depending on the amount of research we need to do to track down the answer, it may take a day or two for us to respond.
Topic / Topic starter Post date Replies Last Post
Normal topic Exemple of image Filter SSE acceleration
by eloise_vidal
Fri, 07/27/2012 - 05:06 1
by Sergey Kostrov
Sun, 07/29/2012 - 09:35
Normal topic RDRAND and Ivy Bridge Celerons
by D. Hugh R.
Sat, 05/21/2016 - 08:43 0
by D. Hugh R.
Sat, 05/21/2016 - 08:43
Hot topic Haswell GFLOPS (Page: 1, 2)
by caosun
Wed, 06/26/2013 - 02:42 72
by Abhishek J.
Thu, 08/18/2016 - 01:06
Normal topic We need standardization of the x86 instruction set
by Agner
Sat, 12/05/2009 - 09:35 10
by Igor Levicki
Sat, 12/05/2009 - 09:35
Normal topic 256 bit subtraction
by garfield-lewis
Wed, 10/03/2012 - 11:17 1
by styc
Sun, 10/14/2012 - 19:49
Normal topic Memory size for VGATHERQPS?
by Jack D.
Sun, 07/03/2016 - 23:49 1
by Mark Charney (Intel)
Wed, 07/13/2016 - 11:40
Normal topic Benefits of SSE/AVX processing when an integrated GPU is missing?
by Toby
Tue, 12/16/2014 - 07:08 5
by Toby
Tue, 12/16/2014 - 09:35
Normal topic New version of Intel(R) SDE posted
by Mark Charney (Intel)
Mon, 01/12/2009 - 06:14 1
by aaron-tersteeg ...
Mon, 01/12/2009 - 06:15
Normal topic SIMD instruction thoughput observations..
by perfwise
Thu, 08/19/2010 - 15:14 3
by perfwise
Mon, 08/23/2010 - 11:21
Normal topic C-State Configuration
by rdmsr64
Thu, 05/12/2011 - 04:49 0
by rdmsr64
Thu, 05/12/2011 - 04:49
Normal topic Array of _m128d values as function argument
by n.anastop
Tue, 03/19/2013 - 06:43 8
by iliyapolak
Fri, 03/22/2013 - 05:42
Normal topic How to multiply __m128 by a scaler?
by lascondes
Wed, 09/30/2009 - 11:30 11
by lascondes
Wed, 09/30/2009 - 11:30
Normal topic 8086 16-bit assembler for Windows 7 X64
by shadab.khatib
Wed, 05/09/2012 - 20:18 2
by Sergey Kostrov
Tue, 05/15/2012 - 18:17
Normal topic intel xe composer compiler with AVX code
by semsem h.
Mon, 01/25/2016 - 07:21 2
by semsem h.
Tue, 01/26/2016 - 06:13
Normal topic PUSH and POP of XMM/YMM registers
by srinivasu
Wed, 06/18/2014 - 04:57 8
by iliyapolak
Thu, 06/19/2014 - 05:42
Normal topic Where can I find comparison between SSE3 and SSE4 instruction set??
by nasayoo
Tue, 06/24/2008 - 05:48 3
by Tim P.
Tue, 06/24/2008 - 08:21
Normal topic 4x4 matrix transpose using sse2 intrinsics
by Smart Lubobya
Sun, 07/04/2010 - 04:59 4
by Smart Lubobya
Fri, 07/09/2010 - 02:54
Normal topic Selector to gate ?
by carsten2
Mon, 07/20/2009 - 20:17 1
by Shih Kuo (Intel)
Thu, 08/06/2009 - 15:40
Normal topic [beginner question] SSE2 / CPU and dynamic/static arrays (C) performance
by vkeller
Thu, 03/10/2011 - 02:14 2
by vkeller
Thu, 03/10/2011 - 02:14
Normal topic About i7 2700k CPU and RAM
by nikromants
Tue, 12/27/2011 - 13:50 2
by Igor Levicki
Tue, 01/17/2012 - 16:10
Normal topic Switching to protected mode clarification
by Nathan P.
Sat, 08/01/2015 - 06:04 4
by Nathan P.
Thu, 10/01/2015 - 05:09
Normal topic Is there some books about SIMD(sse, avx and so on) optimization?
by zhang h.
Tue, 12/17/2013 - 02:08 5
by John McCalpin
Thu, 04/28/2016 - 08:53
Normal topic Q&A: RDTSC to measure performance of small # of FP calculations
by Intel Software ...
Tue, 11/14/2006 - 22:30 4
by Intel Software ...
Fri, 08/31/2007 - 15:09
Normal topic Performance of SHA-3 hash functions on Intel processors (Core 2 platform vs Itanium)
by gligoroski
Wed, 04/21/2010 - 07:18 1
by gligoroski
Wed, 04/21/2010 - 07:20
Normal topic How to reinterpret a __m128 value as __m256?
by Matthias Kretz
Fri, 01/25/2013 - 09:09 2
by Matthias Kretz
Fri, 01/25/2013 - 23:51
New posts
No new posts
Hot topic with new posts
Hot topic without new posts
Sticky topic
Locked topic
For more complete information about compiler optimizations, see our Optimization Notice.