Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
This is a peer forum for developers using Intel® technology. Response times vary depending on the complexity of your issue.
Private messages can only be initiated by Intel employees and members of the Intel® Black Belt Developer program.
Topic / Topic startersort ascending Post date Replies Last Post
Normal topic The structure of ModR/M byte
by logicman112
Tue, 08/17/2010 - 03:50 2
by logicman112
Tue, 08/17/2010 - 03:50
Normal topic the issue about APIC drop msix interrupt
by wei j.
Sun, 06/28/2015 - 18:27 0
by wei j.
Sun, 06/28/2015 - 18:27
Normal topic The dawn of the Intel SSE technology
by Sergey Kostrov
Tue, 02/14/2012 - 09:47 3
by iliyapolak
Sun, 12/23/2012 - 06:34
Normal topic The AVX not effectives
by peryli
Sun, 09/11/2011 - 23:48 2
by peryli
Mon, 09/12/2011 - 19:39
Normal topic test CPU instructions
by paulsohier
Mon, 05/14/2012 - 02:15 2
by Igor Levicki
Mon, 05/14/2012 - 09:49
Normal topic sysenter / sysexit: Inconsistent manual + ring 3 access rights
by Raoul
Tue, 02/08/2011 - 05:48 1
by Shih Kuo (Intel)
Wed, 04/06/2011 - 08:39
Hot topic Synchronizing Time Stamp Counter (Page: 1, 2)
by Roman Oderov
Mon, 10/29/2012 - 11:30 76
by Sergey Kostrov
Tue, 05/21/2013 - 07:07
Normal topic Switching to protected mode clarification
by Nathan P.
Sat, 08/01/2015 - 06:04 4
by Nathan P.
Thu, 10/01/2015 - 05:09
Normal topic Supported processors for PTWRITE instruction?
by Muhammad Usman N.
Wed, 11/30/2016 - 11:37 2
by BEEMAN S. (Intel)
Fri, 02/17/2017 - 12:50
Normal topic Suggestion about memory-access-signaling mechanism
by Luchezar B.
Sat, 11/29/2014 - 03:48 3
by Luchezar B.
Thu, 12/11/2014 - 10:58
Normal topic Studying Intel TSX Performance: strange results
by Alexander K.
Mon, 11/11/2013 - 14:13 9
by jimdempseyatthecove
Mon, 12/30/2013 - 05:08
Normal topic strlen with SSE4.2 instructions
by wmula
Sat, 06/07/2008 - 15:10 2
by Shih Kuo (Intel)
Mon, 07/21/2008 - 22:47
Normal topic Strange IPC behavior
by Patrick P.
Sun, 10/19/2014 - 13:11 5
by Patrick P.
Tue, 10/21/2014 - 04:44
Normal topic Storing data is bottleneck?
by Arthur U.
Wed, 01/09/2013 - 02:31 4
by McCalpin, John
Tue, 03/04/2014 - 12:18
Hot topic Storing data is bottleneck?
by Arthur U.
Wed, 01/09/2013 - 02:31 17
by Sergey Kostrov
Mon, 04/15/2013 - 16:56
Normal topic State of AVX 512 on Skylake-X
by jan v.
Sat, 07/08/2017 - 02:17 8
by jan v.
Thu, 09/07/2017 - 09:02
Normal topic stack around variable x, sse2 intrinsic codes
by Smart Lubobya
Sun, 08/01/2010 - 05:02 1
by neni
Sun, 08/01/2010 - 05:02
Normal topic ssse3+ shuffle instruction
by mustache_marc
Thu, 02/24/2011 - 02:38 2
by denbianh
Thu, 02/24/2011 - 02:38
Normal topic SSSE3 intrinsics compilation error on x64 VC++ 2005 platform
by biplabraut
Tue, 01/20/2009 - 03:01 1
by gabest
Tue, 01/20/2009 - 03:01
Normal topic sse4.2 instructions
by westmere
Fri, 05/01/2009 - 16:03 7
by Shih Kuo (Intel)
Mon, 11/02/2009 - 09:54
Normal topic SSE4.2 cpuid support found in Pin/SDE on Intel but not on AMD...
by perfwise
Thu, 08/26/2010 - 15:00 3
by Mark Charney (Intel)
Thu, 08/26/2010 - 15:01
Hot topic SSE4 Register-Handling
by adrian s.
Wed, 07/10/2013 - 07:58 21
by Sergey Kostrov
Thu, 07/18/2013 - 18:38
Normal topic SSE4 Intrensics on Visual Studio 2008
by Uday Krishna G.
Wed, 07/30/2014 - 23:50 6
by Thomas Willhalm...
Fri, 08/01/2014 - 04:53
Normal topic SSE4 is there a BigInt LIbrary?
by gbrun
Wed, 10/12/2011 - 21:03 3
by styc
Fri, 10/14/2011 - 22:35
Normal topic SSE4
by hjazz
Mon, 01/25/2010 - 23:28 2
by hjazz
Tue, 01/26/2010 - 17:30
New posts
No new posts
Hot topic with new posts
Hot topic without new posts
Sticky topic
Locked topic
For more complete information about compiler optimizations, see our Optimization Notice.