Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
Intel monitors this forum Monday – Friday, 09:00 – 17:00 Pacific Time (GMT –7:00). Depending on the amount of research we need to do to track down the answer, it may take a day or two for us to respond.
Topic / Topic starter Post date Replies Last Postsort descending
Normal topic Problem with SSE2 code
by ijjys
Fri, 09/18/2009 - 11:06 0
by ijjys
Fri, 09/18/2009 - 11:06
Normal topic [smp] Initialization
by medinad
Mon, 09/21/2009 - 08:11 0
by medinad
Mon, 09/21/2009 - 08:11
Normal topic E8400 with Gigabyte G41M-ES2L Motherboard
by g777
Mon, 09/21/2009 - 09:55 0
by g777
Mon, 09/21/2009 - 09:55
Normal topic AVX in Sandy Bridge
by bronxzv
Wed, 09/23/2009 - 03:30 8
by bronxzv
Wed, 09/23/2009 - 04:48
Normal topic gmmintrin.h / AVX intrinsics
by rksm
Thu, 09/24/2009 - 04:27 1
by bronxzv
Fri, 09/25/2009 - 08:30
Normal topic About the override of core frequency
by shihui929
Fri, 09/25/2009 - 11:08 2
by shihui929
Fri, 09/25/2009 - 11:08
Normal topic CPU Serial Enable Support on Intel Processor
by asj_anuroop
Wed, 09/30/2009 - 04:07 2
by knujohn4
Wed, 09/30/2009 - 04:07
Normal topic How to multiply __m128 by a scaler?
by lascondes
Wed, 09/30/2009 - 11:30 11
by lascondes
Wed, 09/30/2009 - 11:30
Normal topic LZCNT on Core i7
by craigj0
Mon, 10/12/2009 - 04:29 1
by Mark Charney (Intel)
Mon, 10/12/2009 - 04:29
Normal topic [smp] processor disabled
by medinad
Thu, 10/15/2009 - 11:12 5
by Igor Levicki
Thu, 10/15/2009 - 11:13
Normal topic Out of order execution
by tthsqe
Thu, 10/15/2009 - 23:53 9
by tthsqe
Thu, 10/15/2009 - 23:53
Normal topic Why only CS, IP and EFLAGS are saved while interrupt??
by cgopi24
Fri, 09/25/2009 - 09:29 1
by Shih Kuo (Intel)
Fri, 10/16/2009 - 01:34
Normal topic Parallel instructions for detecting MSB in array of bytes
by craptacus
Thu, 10/15/2009 - 12:56 6
by bronxzv
Fri, 10/16/2009 - 01:58
Normal topic is there a standard format in which we provide architecture specific information to a software
by ddmetro
Sun, 10/25/2009 - 16:24 0
by ddmetro
Sun, 10/25/2009 - 16:24
Normal topic help on detecting stalls(identifying structural hazards) in assembly code
by ddmetro
Wed, 10/28/2009 - 10:18 1
by Tim P.
Wed, 10/28/2009 - 10:18
Normal topic Opcode semantics
by matt.j
Thu, 08/13/2009 - 18:24 3
by c0d1f1ed
Mon, 11/02/2009 - 00:38
Normal topic sse4.2 instructions
by westmere
Fri, 05/01/2009 - 16:03 7
by Shih Kuo (Intel)
Mon, 11/02/2009 - 09:54
Normal topic Why "subq" as allocate by ICC-v10.0 but not as prologue, but ICC-v11.0 uses "pushq" as prologue?
by srimks
Wed, 01/21/2009 - 01:10 3
by Sergey Maslov (...
Mon, 11/02/2009 - 22:18
Normal topic Understanding my Benchmarks
by Matthias Kretz
Tue, 11/10/2009 - 08:13 5
by Matthias Kretz
Tue, 11/10/2009 - 08:13
Normal topic How many info could I get to estimate DRAM bandwidth?
by hchen229
Tue, 11/17/2009 - 08:17 1
by Roman Dementiev...
Tue, 11/17/2009 - 08:17
Normal topic Low rate on sse2 code
by maa1
Mon, 11/23/2009 - 11:39 0
by maa1
Mon, 11/23/2009 - 11:39
Normal topic PTEST improvement?
by Matthias Kretz
Tue, 11/24/2009 - 00:59 1
by Max Locktyukhin...
Tue, 11/24/2009 - 00:59
Normal topic How does address be mapped onto a memory bank
by zhangyihere
Tue, 12/01/2009 - 02:04 0
by zhangyihere
Tue, 12/01/2009 - 07:30
Normal topic Illegal Instruction -- Intel SDE with AES instructions
by rksm
Tue, 12/01/2009 - 07:58 3
by Mark Charney (Intel)
Tue, 12/01/2009 - 07:58
Normal topic VEX prefix and ymm state saving support
by yuhong2
Thu, 12/03/2009 - 23:19 1
by Brijender Bhart...
Fri, 12/04/2009 - 09:00
New posts
No new posts
Hot topic with new posts
Hot topic without new posts
Sticky topic
Locked topic
For more complete information about compiler optimizations, see our Optimization Notice.