Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication

 
Topic / Topic starter Post datesort descending Replies Last Post
Normal topic GNU-style: Label(B3:) hello.cc(102): error: expected a ")"
by srimks
Fri, 06/05/2009 - 09:47 4
by srimks
Fri, 06/05/2009 - 09:47
Normal topic SDE - how to run multi-threaded programs with 2MB TLB..
by twilkens
Tue, 06/09/2009 - 09:00 3
by Dny
Tue, 06/09/2009 - 09:00
Normal topic Getting -mix output from more than thread 0
by twilkens
Wed, 06/10/2009 - 13:19 2
by twilkens
Wed, 06/10/2009 - 13:19
Normal topic AVX,Compiler,Language,OS,Games
by bbost
Thu, 06/11/2009 - 18:14 1
by Tim Prince
Thu, 06/11/2009 - 23:08
Normal topic fabs() and SIMD
by threethazz
Tue, 06/16/2009 - 08:36 1
by neni
Tue, 06/16/2009 - 08:36
Normal topic Bus Error
by srimks
Thu, 06/18/2009 - 02:39 3
by srimks
Thu, 06/18/2009 - 05:25
Normal topic encoding disp32 in Amd64
by anujgarg2004gma...
Tue, 06/23/2009 - 04:57 2
by anujgarg2004gma...
Tue, 06/23/2009 - 10:09
Normal topic Do the Intel 11.1 compilers support AVX?
by twilkens
Wed, 06/24/2009 - 17:08 5
by twilkens
Wed, 06/24/2009 - 17:08
Normal topic x64/ia64 Assemly Instructions in Code Porting
by gangti
Wed, 07/01/2009 - 20:18 3
by jimdempseyatthecove
Wed, 07/01/2009 - 20:18
Normal topic Can assembly function written with AVX instructions be built for running on corei7?
by satheesan
Fri, 07/03/2009 - 00:25 2
by satheesan
Sun, 07/05/2009 - 20:29
Normal topic CPU enhancement wish list
by youjaes
Sun, 07/05/2009 - 01:37 6
by jimdempseyatthecove
Sun, 07/05/2009 - 01:37
Normal topic Help an Assembler Noob, it's good karma
by tyrch
Tue, 07/07/2009 - 16:06 6
by Agner
Tue, 07/07/2009 - 16:06
Normal topic quad core q9550 question
by threetwo
Wed, 07/08/2009 - 09:47 0
by threetwo
Wed, 07/08/2009 - 09:47
Normal topic __libm_sse2_sincos
by srimks
Mon, 07/13/2009 - 09:32 9
by srimks
Mon, 07/13/2009 - 20:47
Normal topic Behaviour of instructions on 32bit operands in 64 bit mode
by anujgarg2004gma...
Mon, 07/20/2009 - 02:33 4
by carsten2
Mon, 07/20/2009 - 02:33
Normal topic Selector to gate ?
by carsten2
Mon, 07/20/2009 - 20:17 1
by Shih Kuo (Intel)
Thu, 08/06/2009 - 15:40
Normal topic Intel SIMD - Processor Roadmap
by leec
Tue, 07/21/2009 - 23:10 3
by leec
Tue, 07/21/2009 - 23:10
Normal topic movd instruction not working with Masm 8.0
by slider77
Wed, 07/22/2009 - 14:04 1
by mazegen
Wed, 07/22/2009 - 14:04
Normal topic RBX: Segmentation Error.
by srimks
Tue, 07/28/2009 - 09:04 3
by Shih Kuo (Intel)
Tue, 07/28/2009 - 09:09
Normal topic Generating Prefetch Instructions in AVX code...
by twilkens
Thu, 07/30/2009 - 10:49 5
by Martyn Corden (...
Tue, 08/04/2009 - 11:40
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For more complete information about compiler optimizations, see our Optimization Notice.