Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
This is a peer forum for developers using Intel® technology. Response times vary depending on the complexity of your issue.
Private messages can only be initiated by Intel employees and members of the Intel® Black Belt Developer program.
Topic / Topic starter Post date Repliessort descending Last Post
Normal topic elemental functions for Fortan?
by eimunic
Mon, 11/07/2011 - 07:08 1
by Steve Lionel (Intel)
Fri, 12/02/2011 - 14:07
Normal topic Intel® Software Development Emulator, Release 6.7
by Ady Tal (Intel)
Tue, 09/24/2013 - 06:35 1
by iliyapolak
Tue, 09/24/2013 - 11:42
Normal topic Intel TSX with STAMP benchmark
by YangHun P.
Thu, 05/19/2016 - 23:58 1
by Roman Dementiev...
Fri, 05/20/2016 - 07:35
Normal topic SFENCE and peripheral devices
by dm7
Mon, 10/15/2007 - 01:21 1
by Intel Software ...
Tue, 10/16/2007 - 08:36
Normal topic probable mistake in documentation---please check
by logicman112
Fri, 08/27/2010 - 22:15 1
by Anthony Bock (Intel)
Tue, 08/31/2010 - 17:59
Normal topic icpc avx optimization
by (name withheld)
Wed, 01/02/2013 - 10:06 1
by Tim P.
Wed, 01/02/2013 - 13:07
Normal topic A Question about MSR ?
by zp s.
Tue, 04/07/2015 - 10:16 1
by McCalpin, John
Tue, 04/07/2015 - 13:26
Normal topic Introduction to Intel Advanced Vector Extensions
by bronxzv
Tue, 01/31/2012 - 05:27 1
by Max Locktyukhin...
Thu, 02/23/2012 - 03:18
Normal topic Is there an error in Operation pseudo-code for FSIN instruction?
by Sergey Kostrov
Mon, 07/23/2012 - 16:20 1
by iliyapolak
Mon, 07/23/2012 - 17:07
Normal topic Ooops - wrong instruction description in volume 2 of the SDM
by McCalpin, John
Thu, 07/02/2015 - 11:39 1
by Mark Charney (Intel)
Thu, 07/02/2015 - 12:20
Normal topic about _mm_shuffle_epi8 ??
by Gaiger Chen
Wed, 04/06/2011 - 04:03 1
by Gaiger Chen
Wed, 04/06/2011 - 04:03
Normal topic fabs() and SIMD
by threethazz
Tue, 06/16/2009 - 08:36 1
by neni
Tue, 06/16/2009 - 08:36
Normal topic simple question about avx instructions.
by Roberto O.
Mon, 07/15/2013 - 06:42 1
by Tim P.
Mon, 07/15/2013 - 08:42
Normal topic Intel(R) Parallel Studio XE 2017 emulator for linux (SDE)
by Nir H.
Tue, 12/06/2016 - 08:28 1
by Ady Tal (Intel)
Wed, 12/07/2016 - 06:37
Normal topic Branch instructions in 64 bit mode
by logicman112
Tue, 08/03/2010 - 01:43 1
by Shih Kuo (Intel)
Tue, 08/03/2010 - 01:43
Normal topic CPU Instruction counter register
by nuclear_scientist
Fri, 07/31/2009 - 09:37 1
by Tim P.
Fri, 07/31/2009 - 09:37
Normal topic SDE debugtrace output incomplete
by Michael R.
Thu, 09/24/2015 - 14:14 1
by Mark Charney (Intel)
Thu, 09/24/2015 - 14:24
Normal topic Determining if a TSX abort was caused by a segfault
by Mike S.
Wed, 06/01/2016 - 10:34 1
by Roman Dementiev...
Thu, 06/02/2016 - 00:19
Normal topic How interrupt is acknowledged by front side bus?
by logicman112
Sun, 09/05/2010 - 02:58 1
by Aubrey W.
Sun, 09/05/2010 - 02:58
Normal topic How to disable FPU on Intel Core2 Duo
by adamczez
Sat, 05/02/2009 - 03:26 1
by jancino
Sat, 05/02/2009 - 03:26
Normal topic tsod polling in Sandy Bridge
by Brian Stark
Wed, 01/16/2013 - 10:30 1
by Saptarshi S.
Sat, 11/16/2013 - 12:49
Normal topic AVX trial facility
by magicfoot
Sat, 07/02/2011 - 12:59 1
by sirrida
Sat, 07/02/2011 - 12:59
Normal topic Missed optimization opportunities using dvec.h
by jimdempseyatthecove
Wed, 08/08/2012 - 08:21 1
by Zitzlsberger, G...
Thu, 08/09/2012 - 07:36
Normal topic Documentation suggestion
by jimdempseyatthecove
Fri, 02/06/2009 - 07:15 1
by Shih Kuo (Intel)
Fri, 02/06/2009 - 07:15
Normal topic Array Registers
by Daniel F.
Sat, 11/18/2017 - 02:44 1
by jimdempseyatthecove
Sat, 11/18/2017 - 07:25
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For more complete information about compiler optimizations, see our Optimization Notice.