Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
Intel monitors this forum Monday – Friday, 09:00 – 17:00 Pacific Time (GMT –7:00). Depending on the amount of research we need to do to track down the answer, it may take a day or two for us to respond.
Topic / Topic starter Post date Repliessort descending Last Post
Normal topic Intel AVX on Microsoft Windows Vista
by inteleverywhere
Mon, 07/04/2011 - 22:52 1
by Tim P.
Mon, 07/04/2011 - 22:52
Normal topic Compiling with AES-NI in MS Visual Studio 2008/2010
by e.wang
Thu, 10/14/2010 - 13:07 1
by Juan Rodriguez ...
Thu, 10/14/2010 - 13:07
Normal topic rdtscl measures less clock cycles on AMD
by walla71
Mon, 12/01/2008 - 07:48 1
by Tim P.
Mon, 12/01/2008 - 08:37
Normal topic movd instruction not working with Masm 8.0
by slider77
Wed, 07/22/2009 - 14:04 1
by mazegen
Wed, 07/22/2009 - 14:04
Normal topic SFENCE and peripheral devices
by dm7
Mon, 10/15/2007 - 01:21 1
by Intel Software ...
Tue, 10/16/2007 - 08:36
Normal topic inter-procedural TSX
by Shu W.
Sun, 03/13/2016 - 21:42 1
by andysem
Mon, 03/14/2016 - 02:14
Normal topic Use AVX; fallback to SSE4.2
by Levi Morrison
Wed, 11/07/2012 - 11:05 1
by Tim P.
Wed, 11/07/2012 - 18:09
Normal topic Intel 64 documentation bug
by Chris S.
Tue, 03/10/2015 - 17:27 1
by Mark Charney (Intel)
Tue, 03/10/2015 - 19:19
Normal topic vertical sync
by dido88
Wed, 06/01/2011 - 11:39 1
by Thomas Willhalm...
Wed, 06/01/2011 - 11:39
Normal topic Timing of LPT-port
by ugtehservis
Wed, 09/03/2008 - 23:36 1
by Igor Levicki
Tue, 09/30/2008 - 17:35
Normal topic Revision of the volume 3 in the Combined Volumes SDM pdf
by Kostik B.
Sat, 04/16/2016 - 08:41 1
by NICOLE O. (Intel)
Sat, 04/16/2016 - 11:53
Normal topic Intel TSX with STAMP benchmark
by YangHun P.
Thu, 05/19/2016 - 23:58 1
by Roman Dementiev...
Fri, 05/20/2016 - 07:35
Normal topic Is there an error in Operation pseudo-code for FSIN instruction?
by Sergey Kostrov
Mon, 07/23/2012 - 16:20 1
by iliyapolak
Mon, 07/23/2012 - 17:07
Normal topic Instructions Retired Equation
by gokussj9
Fri, 10/01/2010 - 12:38 1
by Thomas Willhalm...
Mon, 10/04/2010 - 01:55
Normal topic AMX Analysis - GNU & Intel
by srimks
Sat, 11/08/2008 - 06:14 1
by Tim P.
Wed, 11/12/2008 - 23:12
Normal topic Intel processor data sheets
by logicman112
Tue, 08/03/2010 - 01:44 1
by Aubrey W. (Intel)
Tue, 08/03/2010 - 01:44
Normal topic I am trying to vectorise
by ikmn j.
Tue, 06/28/2016 - 20:01 1
by jimdempseyatthecove
Wed, 06/29/2016 - 05:09
Normal topic Intel manual has some mistakes
by logicman112
Sat, 06/26/2010 - 21:01 1
by logicman112
Sat, 06/26/2010 - 21:01
Normal topic _byteswap_ulong
by ms2579
Wed, 10/20/2010 - 09:47 1
by Nicolae Popovic...
Wed, 10/20/2010 - 09:47
Normal topic Wrong memory size for VGATHERQPS (?)
by Michael R.
Wed, 07/29/2015 - 13:52 1
by Mark Charney (Intel)
Wed, 07/29/2015 - 14:47
Normal topic instructional change __m128i
by lex
Sat, 06/14/2014 - 14:28 1
by Thomas Willhalm...
Sun, 06/15/2014 - 14:55
Normal topic A problem of iret instruction description in Intel 64 and IA-32 Architectures Software Developers Manual
by Jingguo Yao
Wed, 04/25/2012 - 23:41 1
by Shih Kuo (Intel)
Fri, 04/27/2012 - 14:54
Normal topic psubw code gave wrong result
by Smart Lubobya
Tue, 07/13/2010 - 04:47 1
by neni
Tue, 07/13/2010 - 04:47
Normal topic CPU Instruction counter register
by nuclear_scientist
Fri, 07/31/2009 - 09:37 1
by Tim P.
Fri, 07/31/2009 - 09:37
Normal topic Inconsistency between sections 4.6.1 and 4.6.2 Vol 3A (Paging)
by prism1729
Tue, 02/16/2016 - 14:20 1
by David Koufaty (...
Mon, 02/22/2016 - 14:19
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For more complete information about compiler optimizations, see our Optimization Notice.