Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
Intel monitors this forum Monday – Friday, 09:00 – 17:00 Pacific Time (GMT –7:00). Depending on the amount of research we need to do to track down the answer, it may take a day or two for us to respond.
Topic / Topic starter Post date Repliessort descending Last Post
Normal topic How to do a "jmp 64b address" in X64 ASM pls ?
by ningji
Fri, 07/23/2010 - 13:19 1
by neni
Fri, 07/23/2010 - 13:19
Normal topic elemental functions for Fortan?
by eimunic
Mon, 11/07/2011 - 07:08 1
by Steve Lionel (Intel)
Fri, 12/02/2011 - 14:07
Normal topic 64-ia-32 instruction reference manual --- FXAM description incorrect?
by Andres V.
Wed, 05/04/2016 - 03:44 1
by Mark Charney (Intel)
Wed, 05/04/2016 - 06:24
Normal topic How do you do for access the instructions of the processor.
by wendel-sm
Thu, 06/10/2010 - 11:58 1
by Aubrey W. (Intel)
Thu, 06/10/2010 - 11:58
Normal topic Optimizing SSE2 code and beyond...
by srimks
Fri, 09/04/2009 - 04:58 1
by srimks
Fri, 09/04/2009 - 19:51
Normal topic icpc avx optimization
by (name withheld)
Wed, 01/02/2013 - 10:06 1
by Tim P.
Wed, 01/02/2013 - 13:07
Normal topic Error code of einit
by gu j.
Mon, 01/04/2016 - 05:33 1
by Simon Johnson (...
Mon, 01/04/2016 - 07:51
Normal topic AVX,Compiler,Language,OS,Games
by bbost
Thu, 06/11/2009 - 18:14 1
by Tim P.
Thu, 06/11/2009 - 23:08
Normal topic Difference between L2 cache misses and Bus_Trans_Mem
by gokussj9
Mon, 09/27/2010 - 15:13 1
by neni
Mon, 09/27/2010 - 15:13
Normal topic What is the limit of ICC ?
by zhangxiuxia
Fri, 02/24/2012 - 17:31 1
by Steve Lionel (Intel)
Sun, 02/26/2012 - 11:31
Normal topic stack around variable x, sse2 intrinsic codes
by Smart Lubobya
Sun, 08/01/2010 - 05:02 1
by neni
Sun, 08/01/2010 - 05:02
Normal topic rdtscl measures less clock cycles on AMD
by walla71
Mon, 12/01/2008 - 07:48 1
by Tim P.
Mon, 12/01/2008 - 08:37
Normal topic SHA Extensions are availabe on which microarchitecture?
by Andreas T.
Tue, 06/14/2016 - 15:00 1
by andysem
Wed, 06/29/2016 - 04:59
Normal topic What's the best way to sum up values in __m128 ?
by zlw
Thu, 02/10/2011 - 15:23 1
by Matthias Kretz
Thu, 02/10/2011 - 15:23
Normal topic Intel AVX on Microsoft Windows Vista
by inteleverywhere
Mon, 07/04/2011 - 22:52 1
by Tim P.
Mon, 07/04/2011 - 22:52
Normal topic Message Address Register: Redirection hint & Destination mode
by Yunju K.
Mon, 01/18/2016 - 02:58 1
by Yunju K.
Wed, 01/20/2016 - 16:14
Normal topic Compiling with AES-NI in MS Visual Studio 2008/2010
by e.wang
Thu, 10/14/2010 - 13:07 1
by Juan Rodriguez ...
Thu, 10/14/2010 - 13:07
Normal topic Behavior of some convert instructions with W=1 in non-64-bit mode
by Michael R.
Tue, 09/01/2015 - 17:33 1
by Mark Charney (Intel)
Wed, 09/02/2015 - 04:23
Normal topic Is xend treated as a full memory barrier?
by william laeder
Fri, 01/13/2017 - 06:25 1
by McCalpin, John
Fri, 01/13/2017 - 11:24
Normal topic SFENCE and peripheral devices
by dm7
Mon, 10/15/2007 - 01:21 1
by Intel Software ...
Tue, 10/16/2007 - 08:36
Normal topic Use AVX; fallback to SSE4.2
by Levi Morrison
Wed, 11/07/2012 - 11:05 1
by Tim P.
Wed, 11/07/2012 - 18:09
Normal topic SDE debugtrace output incomplete
by Michael R.
Thu, 09/24/2015 - 14:14 1
by Mark Charney (Intel)
Thu, 09/24/2015 - 14:24
Normal topic Intel 64 documentation bug
by Chris S.
Tue, 03/10/2015 - 17:27 1
by Mark Charney (Intel)
Tue, 03/10/2015 - 19:19
Normal topic vertical sync
by dido88
Wed, 06/01/2011 - 11:39 1
by Thomas Willhalm...
Wed, 06/01/2011 - 11:39
Normal topic Timing of LPT-port
by ugtehservis
Wed, 09/03/2008 - 23:36 1
by Igor Levicki
Tue, 09/30/2008 - 17:35
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For more complete information about compiler optimizations, see our Optimization Notice.