Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
Intel monitors this forum Monday – Friday, 09:00 – 17:00 Pacific Time (GMT –7:00). Depending on the amount of research we need to do to track down the answer, it may take a day or two for us to respond.
Topic / Topic starter Post date Replies Last Post
Normal topic Incomplete declaration of __m256 AVX data type in Visual Studio 2010
by Sergey Kostrov
Thu, 02/07/2013 - 06:16 0
by Sergey Kostrov
Thu, 02/07/2013 - 06:16
Normal topic MPX instructions not in the Appendix A opcode map
by Bea T.
Wed, 07/01/2015 - 14:28 0
by Bea T.
Wed, 07/01/2015 - 14:28
Normal topic does this exception/interrupt handler run?
by logicman112
Mon, 09/06/2010 - 23:44 0
by logicman112
Mon, 09/06/2010 - 23:44
Normal topic Intel Intrinsic Guide won't run on my XP SP2
by unrheal
Thu, 04/03/2008 - 15:13 3
by vvolkov
Mon, 03/19/2012 - 22:40
Normal topic Converting SSE packed integer handling to AVX
by Grace Oliver (Intel)
Tue, 08/09/2011 - 15:26 8
by Grace Oliver (Intel)
Fri, 08/19/2011 - 12:02
Normal topic monitor/mwait performance differs in different memory addresses
by Hamid b.
Thu, 07/11/2013 - 08:40 7
by iliyapolak
Thu, 08/01/2013 - 10:33
Normal topic Question about the PUSH instruction
by millersd
Wed, 04/30/2008 - 15:55 2
by millersd
Tue, 05/13/2008 - 07:56
Normal topic What is the best way to sum up values in __m256 ?
by zlw
Mon, 09/26/2011 - 16:21 5
by sirrida
Tue, 09/27/2011 - 12:38
Normal topic Typing errors in xmm_func.h header file for _mm_prefetch intrinsic function
by Sergey Kostrov
Tue, 07/30/2013 - 17:51 1
by Sergey Kostrov
Tue, 07/30/2013 - 17:53
Normal topic Intel Compiler/Assembler taking care GNU-style (GAS) "movq/movslq/movss/movsd" calls
by srimks
Sat, 05/30/2009 - 08:44 4
by srimks
Sat, 05/30/2009 - 19:23
Normal topic where can i find the whole instruction set of sandybridge?
by Lin W.
Mon, 12/10/2012 - 00:41 3
by iliyapolak
Sat, 01/05/2013 - 22:53
Normal topic Is profiling information running on SDE accurate and trustable?
by WEI Z. (Intel)
Sun, 03/01/2015 - 04:50 1
by Mark Charney (Intel)
Sun, 03/01/2015 - 04:55
Normal topic adding a constant to array addition in sse2
by Smart Lubobya
Sun, 07/25/2010 - 07:19 1
by Brijender Bhart...
Tue, 07/27/2010 - 11:13
Normal topic probable bug in Intel documentation?
by logicman112
Wed, 06/01/2011 - 03:44 1
by Shih Kuo (Intel)
Fri, 06/10/2011 - 17:19
Hot topic Latency of a General purpose MOV instruction on Intel CPUs
by Sergey Kostrov
Sun, 05/19/2013 - 21:03 22
by Sergey Kostrov
Mon, 05/27/2013 - 05:41
Normal topic vminpd and vmulpd do run concurrently on Haswell and earlier CPUs
by Bartek S.
Thu, 04/07/2016 - 17:38 5
by Bartek S.
Sat, 04/09/2016 - 05:03
Normal topic puzzled by developer manuel
by jvava
Sun, 02/15/2009 - 00:54 5
by jvava
Sat, 02/21/2009 - 19:17
Hot topic Hardware acceleration of Special Functions. (Page: 1, 2)
by iliyapolak
Sat, 06/30/2012 - 23:13 70
by iliyapolak
Thu, 07/19/2012 - 01:08
Normal topic TSX with Haswell-E
by code p.
Sat, 09/06/2014 - 11:51 3
by Roman Dementiev...
Fri, 09/12/2014 - 07:38
Normal topic how to display output in sse intrinsic codes
by Smart Lubobya
Mon, 05/31/2010 - 02:52 4
by bronxzv
Mon, 05/31/2010 - 02:56
Hot topic Intel(R) SDE (emulator) release 3.88 supporting POST-32nm instructions
by Mark Charney (Intel)
Wed, 12/22/2010 - 13:38 19
by bronxzv
Mon, 01/23/2012 - 08:27
Normal topic AVX Base and Turbo Frequencies on non E5 CPUs
by Andrew L.
Mon, 10/19/2015 - 16:22 5
by iliyapolak
Fri, 12/18/2015 - 12:33
Normal topic FMA now an extension of AVX?
by gabest
Wed, 08/27/2008 - 23:58 1
by Thai Le (Intel)
Mon, 09/08/2008 - 09:32
Normal topic IDF 2011avx
by zhangxiuxia
Mon, 02/20/2012 - 04:16 7
by Sergey Kostrov
Wed, 02/22/2012 - 20:05
Normal topic Loops inside transactional regions in RTM (TSX)
by jsg
Tue, 03/04/2014 - 10:18 2
by jimdempseyatthecove
Fri, 03/07/2014 - 04:10
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No new posts
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Hot topic without new posts
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For more complete information about compiler optimizations, see our Optimization Notice.