Intel® Developer Zone:
Intel ISA Extensions

Announcements
 

Support for various extensions to the Intel Instruction Set Architecture, including but not limited to:

  • Intel® AVX, which provides the infrastructure and building blocks for delivering the performance required by the growing needs of applications such as financial analysis, media content creation, encoding and encryption, natural resource industry, and High Performance Computing (HPC)
  • Intel® MPX, which provides the infrastructure for software to trap buffer overflow errors before they can be exploited by malware
  • Intel® SHA Extensions, which provide improved performance for applications using the commonly employed Secure Hash Algorithm to obtain greater data integrity, message authentication, digital signatures and data de-duplication
  • Intel® SGX forum support has been moved to a new location
This is a peer forum for developers using Intel® technology. Response times vary depending on the complexity of your issue.
Private messages can only be initiated by Intel employees and members of the Intel® Black Belt Developer program.
Topic / Topic starter Post date Repliessort descending Last Post
Normal topic PADDW __m128i _mm_add_epi16 ( __m128i a, __m128i b) doubt
by inteleverywhere
Fri, 07/30/2010 - 01:04 1
by Brijender Bhart...
Fri, 07/30/2010 - 10:28
Normal topic Minor documentation bugs of movd and movq
by sirrida
Wed, 11/02/2011 - 07:50 1
by Shih Kuo (Intel)
Wed, 11/02/2011 - 07:50
Normal topic Intel TSX-NI with m3-6Y30 processor
by Jeremy W.
Wed, 01/06/2016 - 07:48 1
by Mark Charney (Intel)
Tue, 01/12/2016 - 14:13
Normal topic Update Bios lennovo t400
by hoapq
Thu, 02/25/2010 - 23:29 1
by Thomas Willhalm...
Thu, 02/25/2010 - 23:29
Normal topic Cache memory
by prakasht
Sat, 09/25/2010 - 19:21 1
by Tim P.
Mon, 09/27/2010 - 05:46
Normal topic cache adressed
by Rafał B.
Fri, 03/24/2017 - 18:11 1
by gaston-hillar
Sun, 04/02/2017 - 20:17
Normal topic AVX,Compiler,Language,OS,Games
by bbost
Thu, 06/11/2009 - 18:14 1
by Tim P.
Thu, 06/11/2009 - 23:08
Normal topic _mm_lddqu_si128 and _mm_loadu_si128
by ivantsou
Tue, 09/28/2010 - 10:51 1
by neni
Tue, 09/28/2010 - 13:59
Normal topic inter-procedural TSX
by Shu W.
Sun, 03/13/2016 - 21:42 1
by andysem
Mon, 03/14/2016 - 02:14
Normal topic code vectorisation
by Smart Lubobya
Sun, 08/01/2010 - 10:13 1
by Brijender Bhart...
Thu, 08/19/2010 - 17:39
Normal topic how best to implement AVX2 _mm256_cmplt_epi32?
by Jeff D.
Thu, 01/08/2015 - 23:23 1
by bronxzv
Fri, 01/09/2015 - 02:54
Normal topic Intel documentation seems to have wrong or ambiguous information!
by logicman112
Sun, 06/13/2010 - 21:24 1
by mecej4
Sun, 06/13/2010 - 21:24
Normal topic Optimizing SSE2 code and beyond...
by srimks
Fri, 09/04/2009 - 04:58 1
by srimks
Fri, 09/04/2009 - 19:51
Normal topic psubw code gave wrong result
by Smart Lubobya
Tue, 07/13/2010 - 04:47 1
by neni
Tue, 07/13/2010 - 04:47
Normal topic Exemple of image Filter SSE acceleration
by eloise_vidal
Fri, 07/27/2012 - 05:06 1
by Sergey Kostrov
Sun, 07/29/2012 - 09:35
Normal topic PCI Legacy Mode - Why does it use subtractive decoding?
by Robert S.
Fri, 07/10/2015 - 17:41 1
by Robert S.
Tue, 07/14/2015 - 06:15
Normal topic help on detecting stalls(identifying structural hazards) in assembly code
by ddmetro
Wed, 10/28/2009 - 10:18 1
by Tim P.
Wed, 10/28/2009 - 10:18
Normal topic 87C196CA vs 87C196CB
by joxalatorn
Wed, 04/13/2011 - 07:51 1
by Aubrey W.
Wed, 04/13/2011 - 07:51
Normal topic Use AVX; fallback to SSE4.2
by Levi Morrison
Wed, 11/07/2012 - 11:05 1
by Tim P.
Wed, 11/07/2012 - 18:09
Normal topic AVX slower than SSE?
by skycle
Fri, 12/09/2011 - 21:29 1
by Maxym Dmytryche...
Sat, 12/10/2011 - 02:49
Normal topic SHA Extensions are availabe on which microarchitecture?
by Andreas T.
Tue, 06/14/2016 - 15:00 1
by andysem
Wed, 06/29/2016 - 04:59
Normal topic AMX Analysis - GNU & Intel
by srimks
Sat, 11/08/2008 - 06:14 1
by Tim P.
Wed, 11/12/2008 - 23:12
Normal topic Intel Compiler AVX Instructions
by inteleverywhere
Fri, 06/18/2010 - 04:02 1
by Thomas Willhalm...
Fri, 06/18/2010 - 04:02
Normal topic Using scatterstore to interleave two (sparse) 512-bit vector registers
by Johannes P.
Thu, 08/24/2017 - 03:29 1
by jimdempseyatthecove
Fri, 08/25/2017 - 07:53
Normal topic reordering issue in a multiprocessor environment
by freeze2046
Fri, 02/04/2011 - 07:24 1
by Max Locktyukhin...
Thu, 02/10/2011 - 12:31
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For more complete information about compiler optimizations, see our Optimization Notice.