Intel® Developer Zone:
Intel® Many Integrated Core Architecture (Intel MIC Architecture)

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Intel® Xeon Phi™

Intel® Xeon Phi™ Coprocessor is the brand name for all Intel® Many Integrated Core Architecture (Intel MIC Architecture) based products. At the end of 2012, Intel launched the first generation of the Intel Xeon Phi product family (coprocessors codenamed "Knights Corner") complementing the existing Intel® Xeon® processor product families to deliver new levels of performance for highly parallel workloads.

This forum is for discussion of public information about Intel MIC Architecture, Intel Xeon Phi Coprocessors, and preparing code to fully utilize this class of machines whether on a single chip or not (this is the key to programming the coprocessor).

Please visit the Developer zone at http://software.intel.com/mic-developer to see all documentation resources available for assessing, configuring, programming, and optimizing for Intel Xeon Phi Coprocessors.

Questions will be answered by both peers and Intel representatives that monitor this forum.

We invite you to subscribe to this forum to see new threads and updates (see button below, on the right). Please also note the ability to search for specific information within this forum, by clicking the button below, on the left.

Intel monitors this forum Monday – Friday, 09:00 – 17:00 Pacific Time (GMT –7:00). Depending on the amount of research we need to do to track down the answer, it may take a day or two for us to respond.
Topic / Topic starter Post date Replies Last Postsort ascending
Sticky topic Sticky: Invitation to join the Intel(R) Parallel Studio XE 2017 Beta program
by Loc N. (Intel)
Wed, 04/06/2016 - 12:06 0
by Loc N. (Intel)
Wed, 04/06/2016 - 12:06
Sticky topic Sticky: What collateral/documentation do you want to see? (Page: 1, 2)
by Belinda Liviero...
Thu, 02/07/2013 - 15:59 66
by Frances Roth (Intel)
Mon, 11/16/2015 - 16:48
Sticky topic Sticky: 1.5 days of “Intel HPC Developers Conference” just before SC15 (in Austin)…November 14-15
by Kathy F. (Intel)
Fri, 09/25/2015 - 14:47 0
by Kathy F. (Intel)
Fri, 09/25/2015 - 14:47
Sticky topic Sticky: FAQS: Compilers, Libraries, Performance, Profiling and Optimization.
by Sumedh Naik (Intel)
Mon, 01/21/2013 - 15:57 9
by sa A.
Fri, 09/11/2015 - 12:55
Sticky topic Sticky: New tool available in beta: Vectorization Advisor
by Belinda Liviero...
Thu, 04/23/2015 - 14:16 2
by Frances Roth (Intel)
Fri, 05/15/2015 - 10:36
Sticky topic Sticky: Troubleshooting HOWTO: Bad hardware? MPSS? Configuration?
by Belinda Liviero...
Tue, 06/18/2013 - 16:30 37
by Frances Roth (Intel)
Wed, 05/13/2015 - 15:18
Sticky topic Sticky: Intel® Xeon Phi™ Coprocessor - ROADMAPS
by Frances Roth (Intel)
Tue, 03/24/2015 - 10:45 0
by Frances Roth (Intel)
Tue, 03/24/2015 - 10:45
Sticky topic Sticky: Flash Issues & Remedies
by MARC B. (Intel)
Wed, 11/27/2013 - 15:51 5
by Frances Roth (Intel)
Thu, 10/30/2014 - 17:49
Normal topic Clarification on the Capabilities of Xeon Phi
by lee w.
Wed, 06/29/2016 - 08:07 1
by jimdempseyatthecove
Wed, 06/29/2016 - 11:40
Normal topic Asynchronous Data Tarnsfer
by Joao Paulo Z.
Tue, 06/28/2016 - 13:38 0
by Joao Paulo Z.
Tue, 06/28/2016 - 13:38
Normal topic KNL book shipping
by Craig R.
Tue, 06/28/2016 - 11:55 1
by Tim P.
Tue, 06/28/2016 - 12:16
Normal topic “Intel® Xeon Phi™ Processor” website has been launched
by Loc N. (Intel)
Mon, 06/27/2016 - 17:26 0
by Loc N. (Intel)
Mon, 06/27/2016 - 17:26
Normal topic Xeon PHI library
by Donato P.
Thu, 06/23/2016 - 07:06 10
by Loc N. (Intel)
Mon, 06/27/2016 - 10:03
Normal topic RDMA troubles after install MIC
by Anton R.
Mon, 06/20/2016 - 08:58 1
by Loc N. (Intel)
Sat, 06/25/2016 - 15:23
Normal topic template instantiation for MIC
by Dorian C.
Wed, 06/22/2016 - 23:08 1
by Dorian C.
Thu, 06/23/2016 - 23:47
Normal topic kmp_csupport.c: No such file or directory.
by rachael g.
Mon, 06/20/2016 - 21:40 7
by Rajiv Deodhar (...
Thu, 06/23/2016 - 22:42
Normal topic Deciding Between Automatic Offload and the Automatic/Compiler Assisted Offload Combination
by Brandon P.
Mon, 06/20/2016 - 14:10 0
by Brandon P.
Mon, 06/20/2016 - 14:10
Normal topic Offload from dynamic link library
by Fedor Z.
Mon, 06/20/2016 - 03:35 0
by Fedor Z.
Mon, 06/20/2016 - 03:35
Normal topic Why can't instruction from the same context be issued back to back
by Dani T.
Sat, 06/18/2016 - 10:44 1
by James Cownie (Intel)
Mon, 06/20/2016 - 02:01
Normal topic offload got stuck
by Christof Soeger
Wed, 06/01/2016 - 08:17 2
by Christof Soeger
Fri, 06/17/2016 - 16:41
Normal topic Upgrading mpss and lustre integration
by Dwight N.
Wed, 06/15/2016 - 08:41 0
by Dwight N.
Wed, 06/15/2016 - 08:41
Normal topic Intel Python seems to not run on Phi - miccheck etc pass
by Andrew D.
Thu, 06/02/2016 - 06:52 3
by Sergey Maidanov...
Wed, 06/15/2016 - 06:05
Normal topic MIC reset fails with POST code F2
by Shereef S.
Wed, 06/01/2016 - 22:41 4
by Shereef S.
Wed, 06/15/2016 - 00:59
Normal topic Data persistence on MIC and "nocopy"
by Dorian C.
Wed, 06/08/2016 - 23:25 9
by Dorian C.
Mon, 06/13/2016 - 03:13
Normal topic Optimizing Scatter Intrinsics
by Michael J.
Sat, 06/11/2016 - 12:06 5
by jimdempseyatthecove
Sun, 06/12/2016 - 18:32
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For more complete information about compiler optimizations, see our Optimization Notice.