Message Ordering from Kernel SCIF APIs

Message Ordering from Kernel SCIF APIs

We're working on Kernel Mode applications on MIC. It is not clear from the document whether SCIF send/recv APIs guarantee message ordering; that is: Say .. On host side: two threads send messages via scif_send() in sequential order (controlled by lock)

If the card side has only one recv thread, will scif_recv() received the two messages in the order of sends ? Will the messages interleave ?






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Yes, scif_recv will receive the message in the order of send. Actually, if you set scif_send as blocked send, the thread will be blocked until the message is received by scif_recv, so your next scif_send would be executed only after your first send. 

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