I want to purchase Xeon Phi Coprocessor for researching purposes,
and I want to know if I can get each core temperature using its tools and software ??
Thanks in advance,
Yes, for example by the micsmc or micsmc-gui tool.
So, just to be sure, I can get at a speccific time 80 temperature values for the 80 running cores ?
No temperature measurements by individual cores. The tool does show CPU utilization by core.
So micsmc tool just give one temperature value of the whole cores (maybe the maximum or average).
I have seen some researcher used Intel's Quad-core system with a Machine Specific Register (MSR) to access Digital Thermal Sensor.
In MSR, they use IA32_THERM_STATUS register in order to get temperature of each core.
Is there something similar in Xeon Phi, till we get the temperature for each core ???
Thanks in advance
I'm trying to find the answer for you. The first person I contacted said that he knows of none, but this isn't a definite answer.
Ok. Thanks. I will wait, because my decision of buying it depends on this point.
I found already in the file: xeon-phi-software-developers-guideTable 2-12 Intel MIC Architecture commandsmicsmc: displays the card thermal, electrical and usage parameters. For example:core temperature, core usage,.....
So, does it mean the temperature of each core or one value for the all cores ????
In micsmc it says "average core temperature," so I assume it's an average across all the cores.
As far as I can tell, it isn't in the list of PMU (Performance Monitoring Unit) events given by http://software.intel.com/sites/default/files/forum/278102/intelr-xeon-phitm-pmu-rev1.01.pdf.
I'm still trying to find out if we can get individual core temperatures. Something calculates the average from some data.
Unlike other IA cores, there is not a temperature sensor for every core on the first generation Xeon Phi. Instead, there are a series of sensors scattered around the die. They can be accessed by reading the CURRENT_DIE_TEMPn registers in SBOX. The Intel(R) Xeon Phi(TM) Coprocessor Systems Software Developers Guide has the location of these registers in MMIO.
thank you for this information ..