From the Q&A http://software.intel.com/en-us/articles/intelr-xeon-phitm-coprocessor-f... it appears CMPXCHG16B is supported for the Xeon Phi.
However, compiling I get the following:
/tmp/icpc8hU1ksas_.s: Assembler messages:
/tmp/icpc8hU1ksas_.s:42: Error: `cmpxchg16b' is not supported on `k1om'
If it's not support, what alternatives are there for implementing lock-free algorithms on the Phi (can double width CAS instructions be implemented?)