MPSS 3.8 is released!

MPSS 3.8 is released!

Hello,

Please note that MPSS 3.8 is now available at https://software.intel.com/en-us/articles/intel-manycore-platform-software-stack-mpss  .

Below is the list of major changes:

  • Add MPSS support for SLES12 SP2

  • Add MPSS support for RHEL 7.3

  • Support for OpenMP 4.5

  • Directory /opt/mpss/x100 pointing to latest MPSS version

  • Drop MPSS support for RHEL 7.0

  • Drop MPSS support for RHEL 6.6

  • Drop MPSS support for Windows 7

  • Drop MPSS support for Windows Server 2008 R2 SP1

  • Drop MPSS support for Windows 8

Thank you

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For more complete information about compiler optimizations, see our Optimization Notice.

Hello!

When can we expect support for RHEL 7.4 with kernel 3.10.0-693.el7.x86_64?

Hi Alexey,

Starting from Q2 2017, future MPSS 3.8 will not add support for new OS.  

Please explain what we should do in this case?

Our customers globally migrate their labs to RHEL 7.4, but they cannot complete this vital migration which is going right now.

So your advise will be very much appreciated.

Can you still consider add support for RHEL 7.4 as this is extremely needed for our customers worldwide?

This is an interesting thread between two Intel people...

  • Observation 1: the Xeon Phi x100 coprocessor range was introduced between Q2 2012 and Q2 2014
  • Observation 2: the Xeon Phi x200 coprocessor range has been terminated prematurely
  • Observation 3: the Intel C/C++ 2018 compiler no longer supports the KNC (mic) target
  • Observation 4: the last version of MPSS seems to be 3.8.2 which supports RHEL 7.3, not 7.4/7.5 etc

My hopefully premature conclusion is:  customers who bought (are still buying!!) Xeon Phi x100 cards (KNC) are stuck with unsupported hardware only 3 years after the product came on the market (e.g. the 7210A) ?!?!?!

Is someone from Intel willing to come out and officially state this? Or better yet, deny this and announce customer support for those people who bought the Xeon Phi coprocessors for at least a few more years?

 

 

IMHO, Intel is really missing the boat on this. MPSS provides for Offload capabilities to a CPU/CPUs contained within the system box. Currently this had been Xeon Phi x100 coprocessors, and to those on a short list, the Xeon Phi x200 coprocessors. The boat they are missing is that a coprocessor (or coprocessors) could as easily be constructed using Core i9 Skylake processors (or any of their other CPUs).

Advantages:

1) You do not need to buy a new motherboard and go through the hassle of reconfiguring your workstation
or
2) You do not need to buy a second workstation (case, motherboard, power supply, storage device) together with 10GbE or 100GbE plus appropriate switch to construct a cluster.

One can quite cost effectively construct a cluster within a system box and having PCIe communication bandwidth. Intel, please note that this cost effectiveness does not come out of your bottom line (sales of CPUs will increase).

Jim Dempsey

IMHO, Intel is really missing the boat on this. 

JIm,

there's absolutely nothing to stop any hardware vendor who thinks this is a great opportunity from building such cards. Intel can't do everything, and, indeed, sometimes we're criticised for doing too much and competing with our customers. I'm certain that we'll be very happy to sell you CPUs :-) for these cards.

Indeed if it's so brilliant, I see crowd-funding sites and venture capitalists in your future! 

Jim,

>>there's absolutely nothing to stop any hardware vendor who thinks this is a great opportunity from building such cards

I fully agree to some extent.

One of the implementation issues is to build a plug-in card with CPU, RAM, some Flash, PCIe (slave) controller, perhaps USB and 1GBe. If you surface/flush mount the RAM and liquid cool the CPU this could potentially be a single height card.

A second issue, perhaps too high of a hurdle (too high of a risk) for most hardware vendors, is the software end of the solution: MPSS, SCIF, .AND. compiler integration. Intel currently has (up to V17u4) a complete software solution (for KNC/KNL).

Excepting for heterogeneous solutions using GPUs, GPGPUs (Tesla), Intel has a corner on the market for a homogeneous solution... and they do not realize this, at least to the point of having identifying this a means to expand CPU and xxx-bridge sales.

In my humble office (I work alone), I have a Core i7 2600K in tower, Xeon E5-2620v2 in tower (with two KNC's), and a KNL 7210 in tower plus some notebooks. I also have a bunch of systems taken out of service.

While I would like to have some of the newest Intel CPU's, I have too much of an investment in systems to replace existing equipment, I do not want the inconvenience of updating a motherboard, RAM, and re-installing O/S, reinstalling several versions of compilers, reinstalling compilers, and IDE's (and in the case of my Windows systems getting MS to accept my license keys because I've done this several times). Then shaking out any issues (3 days if I am lucky). Adding a new system box is expensive, I do not have the room, I do not have sufficient AC power, I do not have sufficient air-conditioning.

This said, the convenience of, and cost savings of, constructing a cluster by way of add-in cards is extremely attractive:

I have an initial investment of time installing MPSS... without any disruption in my current development/production system.
Adding a node is relatively painless, shutdown, insert card, connect power, power-up.

I would like to suggest that Intel perform a survey, perhaps initially on IDF, to see if there would be an interest in Intel extending MPSS support together with coprocessor product lines containing: Core X-series Processors, Xeon Series, Atom...

Anyone else reading this thread that has an interest, please comment.

Jim Dempsey

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