Intel® Developer Zone:
Intel® Many Integrated Core Architecture (Intel MIC Architecture)

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Intel® Xeon Phi™

Intel® Xeon Phi™ Coprocessor is the brand name for all Intel® Many Integrated Core Architecture (Intel MIC Architecture) based products. At the end of 2012, Intel launched the first generation of the Intel Xeon Phi product family (coprocessors codenamed "Knights Corner") complementing the existing Intel® Xeon® processor product families to deliver new levels of performance for highly parallel workloads.

This forum is for discussion of public information about Intel MIC Architecture, Intel Xeon Phi Coprocessors, and preparing code to fully utilize this class of machines whether on a single chip or not (this is the key to programming the coprocessor).

Please visit the Developer zone at http://software.intel.com/mic-developer to see all documentation resources available for assessing, configuring, programming, and optimizing for Intel Xeon Phi Coprocessors.

Questions will be answered by both peers and Intel representatives that monitor this forum.

We invite you to subscribe to this forum to see new threads and updates (see button below, on the right). Please also note the ability to search for specific information within this forum, by clicking the button below, on the left.

Topic / Topic starter Post date Repliessort descending Last Post
Normal topic New article: Resource Guide for People Investigating the Intel® Xeon Phi™ Coprocessor
by Taylor Kidd (Intel)
Wed, 03/26/2014 - 10:51 0
by Taylor Kidd (Intel)
Wed, 03/26/2014 - 10:51
Normal topic choose _mm512_permutevar_epi32 or _mm512_shuffle/permute4f128_epi32?
by Kaixi H.
Mon, 12/29/2014 - 11:37 0
by Kaixi H.
Mon, 12/29/2014 - 11:37
Normal topic Capacity abort when using RTM provided by haswell
by zhaoguo w.
Sat, 06/15/2013 - 01:58 0
by zhaoguo w.
Sat, 06/15/2013 - 01:58
Normal topic mpss-daemon-3.2 bug
by Antonio B.
Fri, 07/25/2014 - 08:20 0
by Antonio B.
Fri, 07/25/2014 - 08:20
Normal topic internal error: bad pointer
by yongbei m.
Wed, 04/01/2015 - 05:51 0
by yongbei m.
Wed, 04/01/2015 - 05:51
Normal topic Intel® Xeon Phi™ Coprocessor September 2013 Developer Webinar Q&A Responses just published
by robert-reed (Intel)
Wed, 10/23/2013 - 17:20 0
by robert-reed (Intel)
Wed, 10/23/2013 - 17:20
Normal topic New Tools: Simple Performance Tools for the Intel® Xeon® processor line and the Intel® Xeon Phi™ coprocessor
by Sumedh Naik (Intel)
Fri, 10/04/2013 - 15:18 0
by Sumedh Naik (Intel)
Fri, 10/04/2013 - 15:18
Normal topic Intel® Xeon Phi™ Coprocessor enabled applications on Stampede
by BELINDA L. (Intel)
Tue, 11/18/2014 - 15:53 0
by BELINDA L. (Intel)
Tue, 11/18/2014 - 15:53
Normal topic Integrated Memory Controller device missing in Linux running on Xeon e5-2648L
by Swati M.
Wed, 08/21/2013 - 08:11 0
by Swati M.
Wed, 08/21/2013 - 08:11
Normal topic Intel® Xeon® Processors & Xeon® Phi™ Coprocessors Webinars - Sept 24 (6:45 A.M. PDT) & Sept 25 (7:00 A.M. PDT) and Oct 8, 9
by kathy-farrel (Intel)
Mon, 09/23/2013 - 16:33 0
by kathy-farrel (Intel)
Mon, 09/23/2013 - 16:33
Normal topic June 2013 announcements: Acceleware, Bright Computing
by kathy-farrel (Intel)
Wed, 06/12/2013 - 12:20 0
by kathy-farrel (Intel)
Wed, 06/12/2013 - 12:20
Normal topic Regarding intel MIC offload error: buffer write failed
by puneet s.
Mon, 03/30/2015 - 04:04 0
by puneet s.
Mon, 03/30/2015 - 04:04
Normal topic MICRAS Log User Guide
by MARC B. (Intel)
Wed, 11/27/2013 - 16:07 0
by MARC B. (Intel)
Wed, 11/27/2013 - 16:07
Normal topic How To Froce a Kernel Dump
by Wendy C.
Tue, 08/13/2013 - 16:52 0
by Wendy C.
Tue, 08/13/2013 - 16:52
Closed topic Invitation to evaluate Intel® MKL Sparse Matrix Vector Multiply Format Prototype Package for Intel® Xeon Phi™ coprocessors
by Zhang Z (Intel)
Mon, 12/23/2013 - 14:31 0
by Zhang Z (Intel)
Mon, 12/23/2013 - 14:31
Normal topic New case study: shallow water equation solver
by Andrey Vladimirov
Mon, 05/12/2014 - 10:35 0
by Andrey Vladimirov
Mon, 05/12/2014 - 10:35
Normal topic Asynchronous DRAM refresh for xeon E5-2600
This topic has been moved to "Software Tuning, Performance Optimization & Platform Monitoring" (View topic)
Normal topic Issues using virtual shared memory with STL
by Yu Dong Y.
Wed, 06/05/2013 - 02:26 0
by Yu Dong Y.
Wed, 06/05/2013 - 02:26
Normal topic New MPSS suports SuSE SLES 12
by loc-nguyen (Intel)
Sun, 02/22/2015 - 07:18 0
by loc-nguyen (Intel)
Sun, 02/22/2015 - 07:18
Normal topic Q&A responses posted from the June 2013 developer's introduction to Intel Xeon Phi programming
by robert-reed (Intel)
Wed, 07/17/2013 - 23:50 0
by robert-reed (Intel)
Wed, 07/17/2013 - 23:50
Normal topic HostbasedAuthentication working for us
by Kazutomo Y.
Fri, 07/05/2013 - 11:42 0
by Kazutomo Y.
Fri, 07/05/2013 - 11:42
Normal topic Intel® Xeon Phi™ Coprocessor Applications catalog available
by BELINDA L. (Intel)
Mon, 10/27/2014 - 10:31 0
by BELINDA L. (Intel)
Mon, 10/27/2014 - 10:31
Normal topic OFED-MIC IPoIB, RDMA
by Siva R.
Thu, 01/29/2015 - 04:20 0
by Siva R.
Thu, 01/29/2015 - 04:20
Normal topic Customer survey on deprecating micctrl filelist capability
by loc-nguyen (Intel)
Thu, 07/24/2014 - 17:31 0
by loc-nguyen (Intel)
Thu, 07/24/2014 - 17:31
Normal topic Alpha release of the Glasgow Pascal compiler for the MIC
by Paul C.
Thu, 07/11/2013 - 15:08 0
by Paul C.
Thu, 07/11/2013 - 15:08
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For more complete information about compiler optimizations, see our Optimization Notice.