Intel® Developer Zone:
Intel® Many Integrated Core Architecture (Intel MIC Architecture)

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Intel® Xeon Phi™

Intel® Xeon Phi™ Product family is the brand name for all Intel® Many Integrated Core Architecture (Intel® MIC Architecture) based products. In 2016, Intel launched the second generation Intel Xeon Phi Processor delivering new levels of performance for highly parallel workloads.

This forum is for discussion of public information about Intel MIC Architecture, Intel Xeon Phi Processors, and preparing code to fully utilize this class of machines.

Please visit the Developer zone at https://software.intel.com/en-us/xeon-phi/x200-processor to see all documentation resources available for assessing, configuring, programming, and optimizing for Intel Xeon Phi Processors.

This is a peer forum for developers using Intel® technology. Response times vary depending on the complexity of your issue.
Private messages can only be initiated by Intel employees and members of the Intel® Black Belt Developer program.
Topic / Topic starter Post date Replies Last Post
Normal topic Using with Linux 3.13+
by Sait U.
Wed, 02/05/2014 - 11:17 2
by Sait U.
Fri, 02/07/2014 - 16:29
Normal topic Booting a Non-Linux OS
by Reto A.
Thu, 03/27/2014 - 12:48 6
by Reto A.
Wed, 04/02/2014 - 09:11
Normal topic mounting GPFS on Xeon Phi
by Wadud M.
Thu, 09/11/2014 - 03:48 9
by Michael R.
Wed, 04/22/2015 - 10:30
Normal topic what is the CPUID test for KNCNI?
by Jeff D.
Wed, 01/07/2015 - 15:27 2
by Evan P. (Intel)
Wed, 01/07/2015 - 16:39
Normal topic MPI call of host offloaded
by aketh t.
Fri, 05/01/2015 - 06:02 5
by Frances Roth (Intel)
Mon, 05/04/2015 - 15:44
Normal topic Matrix transposition on MIC: white paper and unsolved problems
by Andrey Vladimirov
Thu, 04/25/2013 - 10:56 1
by Frances Roth (Intel)
Tue, 08/13/2013 - 23:56
Normal topic Global memory with OpenCL
by Prasanna P.
Tue, 07/23/2013 - 10:41 5
by Nguyen, Loc Q (...
Mon, 07/29/2013 - 11:31
Normal topic Runtime error with Offload
by chavhan, hitesh
Sun, 04/27/2014 - 23:49 8
by Kevin D (Intel)
Fri, 05/09/2014 - 01:35
Normal topic use VM _Cilk_shared_malloc how much memory can I apply
by bing z.
Sat, 05/30/2015 - 01:49 1
by Frances Roth (Intel)
Fri, 07/10/2015 - 12:41
Normal topic I need to specify -iface br0 to run on mic's [SOLVED]
by Anders H.
Thu, 12/03/2015 - 00:45 2
by Anders H.
Thu, 12/03/2015 - 02:31
Normal topic Cannot launch mpiexec.hydra on Knights Landing processors
by Gary L.
Fri, 08/05/2016 - 07:06 4
by Gary L.
Tue, 08/09/2016 - 01:06
Normal topic Can Intel Xeon Phi get data direct from another PCI device?
by Joe C.
Tue, 07/04/2017 - 21:35 0
by Joe C.
Tue, 07/04/2017 - 21:35
Normal topic KMP_PLACE_THREADS OpenMP affinity variable
by james B.
Sun, 05/19/2013 - 06:03 4
by Tim P.
Fri, 05/31/2013 - 09:23
Normal topic how to deal with structure of arrays in the pragma offload model
by King Crimson
Tue, 12/04/2012 - 22:57 3
by King Crimson
Thu, 12/06/2012 - 20:56
Normal topic MIC offload using C++
by Salvadore, Francesco
Tue, 11/19/2013 - 10:38 5
by Kevin D (Intel)
Tue, 09/16/2014 - 03:53
Hot topic Parallelising this algorithm for MIC: Stuck!
by james B.
Tue, 08/20/2013 - 10:16 18
by Ravi V. (Intel)
Tue, 09/10/2013 - 21:01
Normal topic I need some help about "undefined reference to _mm_tzcnti_64" link error
by yuanyuan s.
Fri, 06/06/2014 - 07:13 6
by yuanyuan s.
Mon, 07/07/2014 - 06:58
Normal topic Frequency per core on Xeon Phi
by Sun L.
Mon, 07/13/2015 - 02:47 3
by Frances Roth (Intel)
Mon, 07/20/2015 - 13:10
Normal topic Strange Errors by reseting mic configuration
by Kevin F.
Fri, 01/22/2016 - 02:27 2
by Kevin F.
Mon, 02/01/2016 - 04:26
Normal topic Apply _CIlk_shared to static and local variables
by Shanci G.
Thu, 10/27/2016 - 19:21 0
by Shanci G.
Thu, 10/27/2016 - 19:21
Normal topic R on Xeon Phi
by Chetan Arvind Patil
Fri, 10/06/2017 - 12:06 2
by jimdempseyatthecove
Wed, 10/11/2017 - 10:17
Normal topic MTU missmatch size in external bridge configuration
by marek.kaletka
Tue, 06/18/2013 - 10:44 8
by marek.kaletka
Mon, 08/05/2013 - 10:47
Normal topic Please urgent. How memory paging are assigned to CPU cache sets
by Younis A.
Thu, 06/26/2014 - 04:05 5
by Younis A.
Mon, 06/30/2014 - 04:17
Normal topic Security Advisory: Intel(R) MPSS affected by Shellshock bug
by Belinda Liviero...
Wed, 10/15/2014 - 10:15 3
by Belinda Liviero...
Wed, 11/05/2014 - 16:54
Normal topic problem executing in symmteric mode
by Wasim M.
Mon, 02/09/2015 - 02:28 8
by Wasim M.
Mon, 02/09/2015 - 10:23
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For more complete information about compiler optimizations, see our Optimization Notice.