Intel® Developer Zone:
Intel® Many Integrated Core Architecture (Intel MIC Architecture)

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Intel® Xeon Phi™

Intel® Xeon Phi™ Product family is the brand name for all Intel® Many Integrated Core Architecture (Intel® MIC Architecture) based products. In 2016, Intel launched the second generation Intel Xeon Phi Processor delivering new levels of performance for highly parallel workloads.

This forum is for discussion of public information about Intel MIC Architecture, Intel Xeon Phi Processors, and preparing code to fully utilize this class of machines.

Please visit the Developer zone at https://software.intel.com/en-us/xeon-phi/x200-processor to see all documentation resources available for assessing, configuring, programming, and optimizing for Intel Xeon Phi Processors.

This is a peer forum for developers using Intel® technology. Response times vary depending on the complexity of your issue.
Private messages can only be initiated by Intel employees and members of the Intel® Black Belt Developer program.
Topic / Topic startersort ascending Post date Replies Last Post
Normal topic Where to find detailed code examples for offload in Fortran under both Linux and Windows?
by Anders S.
Fri, 09/18/2015 - 11:55 1
by holmz
Sat, 11/28/2015 - 01:35
Normal topic Where statement and Vectorization
by aketh t.
Mon, 06/22/2015 - 23:59 13
by jimdempseyatthecove
Thu, 06/25/2015 - 09:41
Normal topic where should I put the library required by sink?
by songlinhai
Thu, 06/27/2013 - 08:45 2
by Ravi Narayanasw...
Thu, 06/27/2013 - 09:17
Normal topic Where is perf command?
by GHui
Tue, 12/03/2013 - 20:52 7
by Aram S.
Wed, 03/26/2014 - 00:59
Normal topic Where is micctrl?
by Jyh-Shyong H.
Sat, 11/02/2013 - 06:59 6
by Frances Roth (Intel)
Fri, 11/15/2013 - 18:08
Normal topic Where can I get "intelr-xeon-phitm-pmu-rev1.01.pdf"
by GHui
Wed, 08/14/2013 - 00:12 1
by GHui
Wed, 08/14/2013 - 01:03
Normal topic Where can I find additional info about Intel Xeon E5 QuickData technology?
by Alessio C.
Wed, 02/08/2017 - 00:58 0
by Alessio C.
Wed, 02/08/2017 - 00:58
Normal topic When would the L2_Data_Read_Miss_Cache_Fill happen?
by soso h.
Wed, 03/12/2014 - 00:31 1
by Tim P.
Wed, 03/12/2014 - 05:24
Normal topic when mpirun to host mic, error while loading shared libraries: libmkl_intel_lp64.so
by 杨 栋.
Thu, 07/06/2017 - 04:45 0
by 杨 栋.
Thu, 07/06/2017 - 04:45
Normal topic What's the minimum parallel granularity in OpenCL?
by Caspar Y.
Mon, 05/19/2014 - 20:52 1
by Arik Narkis (Intel)
Tue, 05/20/2014 - 04:04
Normal topic What's the highest performance Sandybridge CPU available in China?
by haixiao j.
Mon, 10/15/2012 - 07:28 1
by Tim P.
Fri, 10/19/2012 - 09:24
Normal topic What's Best Solution of Data Transferring between Host and Mic?
by Bryan H.
Sat, 05/30/2015 - 05:24 1
by Frances Roth (Intel)
Mon, 06/01/2015 - 09:40
Normal topic What qualifies as MIC ?
by magicfoot
Tue, 02/12/2013 - 11:13 2
by Tim P.
Tue, 02/12/2013 - 15:41
Normal topic What options to use building in Visual Studio / command line in Windows?
by maxima
Thu, 12/25/2014 - 09:30 2
by maxima
Tue, 12/30/2014 - 04:21
Hot topic what is the relation between "hardware thread" and "hyperthread"?
by King Crimson
Thu, 05/15/2014 - 14:31 17
by Sergey Kostrov
Fri, 05/12/2017 - 15:24
Normal topic what is the inline-asm constraint for mask registers?
by Matthias Kretz
Tue, 06/11/2013 - 09:16 5
by Matthias Kretz
Tue, 06/18/2013 - 09:02
Normal topic what is the difference between fourth gen. i7 and extreme edition ? help
by Sharif A.
Sat, 08/03/2013 - 03:26 1
by Tim P.
Sat, 08/03/2013 - 06:39
Normal topic what is the CPUID test for KNCNI?
by Jeff D.
Wed, 01/07/2015 - 15:27 2
by Evan P. (Intel)
Wed, 01/07/2015 - 16:39
Normal topic What is the correct way to load the Library Path?
by Chris S.
Wed, 03/18/2015 - 18:42 8
by Chris S.
Fri, 03/20/2015 - 08:44
Normal topic What is the best way to get started now?
by phil d.
Thu, 04/13/2017 - 11:20 11
by Sergey Kostrov
Mon, 05/01/2017 - 15:37
Normal topic what is Memory Bank?
by cengchao z.
Tue, 02/18/2014 - 18:44 2
by Matthias H. (Intel)
Tue, 04/01/2014 - 11:32
Hot topic What does __kmp_wait_yield_4 imply in hot spot analysis of vTune
by YW
Mon, 12/29/2014 - 18:00 22
by YW
Wed, 01/14/2015 - 12:05
Normal topic What does __kmp_hierarchical_barrier_release imply in vTune?
by YW
Sun, 03/08/2015 - 13:43 1
by dmitry-prohorov...
Sun, 03/08/2015 - 15:40
Normal topic What does this thing .L_2il0floatpacket.24 mean?
by Doru Adrian Thom P.
Thu, 07/16/2015 - 10:40 1
by Kevin D (Intel)
Fri, 07/17/2015 - 02:57
Normal topic weird error of Xeon Phi cards on running IMB
by JS
Thu, 05/15/2014 - 19:20 14
by Belinda Liviero...
Tue, 05/20/2014 - 22:46
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For more complete information about compiler optimizations, see our Optimization Notice.