Intel® Developer Zone:
Intel® Manycore Testing Lab (Archived)

Announcements
 

This forum is for all discussions about the new Manycore Testing Lab, which is a remote access development environment that gives university professors and their students the ability to test how their code scales and performs in environments from two cores up to 32 cores. There is a FAQ in the forum that explains how to request access, what to do after you get access, as well as general Q&A about the lab facility itself.

If you’re a current user of the Manycore Testing Lab, or are just wondering what all the fuss is about, this forum is for you!

Topic / Topic starter Post date Replies Last Post
Normal topic The Intel Manycore Testing Lab is open for business but new accounts are being postponed until JAN 3 2011
by jeffrey-gallagh...
Tue, 12/14/2010 - 15:50 0
by jeffrey-gallagh...
Tue, 12/14/2010 - 15:50
Normal topic Gcc 4.5.1 now added to Manycore Testing Lab
by Mike Pearce (Intel)
Thu, 08/05/2010 - 09:18 0
by Mike Pearce (Intel)
Thu, 08/05/2010 - 09:18
Normal topic Job not running
by fitzroy
Wed, 01/04/2012 - 08:36 4
by fitzroy
Wed, 01/04/2012 - 16:07
Normal topic 32 core architecture details
by magicfoot
Tue, 05/11/2010 - 05:22 2
by grant-haab (Intel)
Tue, 05/11/2010 - 05:22
Normal topic Unable to login to kill runaway process
by trbot
Wed, 05/19/2010 - 20:17 6
by trbot
Tue, 05/25/2010 - 13:03
Normal topic Can't apply for MTL
by svensen
Wed, 09/14/2011 - 22:24 9
by Mike Pearce (Intel)
Mon, 11/07/2011 - 09:57
Normal topic Anomalous performance on batch nodes
by trbot
Wed, 03/09/2011 - 18:39 12
by trbot
Thu, 03/24/2011 - 23:15
Normal topic TBB3: number of threads are different on acano01 and batch-system?
by Michael Uelschen
Tue, 08/31/2010 - 04:25 4
by Vladimir Polin ...
Tue, 08/31/2010 - 04:25
Normal topic Help: with 40 threads, duration of workload jumps to 100x of serial with gcc
by Mike Pearce (Intel)
Fri, 06/08/2012 - 15:19 0
by Mike Pearce (Intel)
Fri, 06/08/2012 - 15:19
Normal topic MANY CORE TESTING
by THOUSIEF K.
Tue, 11/05/2013 - 09:07 0
by THOUSIEF K.
Tue, 11/05/2013 - 09:07
Normal topic When continue testing?
by bambucha
Fri, 05/28/2010 - 01:57 2
by bambucha
Fri, 05/28/2010 - 01:57
Normal topic SSH immediate logoff
by mbait
Thu, 10/27/2011 - 19:50 1
by Mike Pearce (Intel)
Thu, 10/27/2011 - 19:50
Normal topic Having trouble getting VNC to work
by fmstephe
Sat, 04/16/2011 - 17:35 2
by JudLup Luna
Wed, 04/04/2012 - 10:20
Normal topic Visual Studio 2010 installed
by Mike Pearce (Intel)
Wed, 09/29/2010 - 13:43 0
by Mike Pearce (Intel)
Wed, 09/29/2010 - 13:43
Normal topic SMT enabled on ACAN001 but not on ACAN003?
by Lars Bergstrom
Fri, 10/15/2010 - 14:09 2
by Lars Bergstrom
Fri, 10/15/2010 - 14:09
Normal topic Does my job run on a box with multiple cpus?
by ddcc
Fri, 06/25/2010 - 10:06 1
by Mike Pearce (Intel)
Fri, 06/25/2010 - 13:27
Normal topic Can't ssh to mtl
by cdrnel001
Thu, 11/10/2011 - 10:24 2
by Asmaa Rabie
Thu, 11/10/2011 - 10:24
Normal topic Sign up for the Beta contest
by Paul Steinberg ...
Tue, 03/23/2010 - 20:44 0
by Paul Steinberg ...
Tue, 03/23/2010 - 20:44
Normal topic Maintenance?
by Lukasz Swierczewski
Mon, 05/30/2011 - 09:00 0
by Lukasz Swierczewski
Mon, 05/30/2011 - 09:12
Normal topic Intel Fortran & C/C++ Composer XE now installed on the MTL
by Mike Pearce (Intel)
Fri, 11/12/2010 - 08:55 0
by Mike Pearce (Intel)
Fri, 11/12/2010 - 08:55
Normal topic perf_events
by zmajo
Tue, 07/13/2010 - 02:04 0
by zmajo
Tue, 07/13/2010 - 02:04
Normal topic error with qsub syntax
by dina_a
Mon, 11/14/2011 - 15:09 2
by Vladimir Polin ...
Mon, 11/14/2011 - 15:11
Normal topic How to access the MTL using a 64-bit Windows OS
by Mike Pearce (Intel)
Tue, 04/13/2010 - 13:42 2
by Mike Pearce (Intel)
Mon, 08/02/2010 - 11:17
Normal topic Performance conundrum
by ddcc
Mon, 07/11/2011 - 20:31 9
by jeffrey-gallagh...
Wed, 07/13/2011 - 09:46
Normal topic let your jobs log in a dir other than your homedir trick
by Peter Sels
Sun, 08/28/2011 - 05:04 0
by Peter Sels
Sun, 08/28/2011 - 05:04
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For more complete information about compiler optimizations, see our Optimization Notice.